102
Rigel-PJ1nx Training
Slide 102
Panel Correction/Drive Processor Block
The video signal and the timing signal for the LC panel driving inputs entered
from IC3001 in the 10-bit_3ch are fed to the 12-phase decoding LC panel driver
ICs (IC5501,5601,5701) in the 12-bit x2-layer x3ch via the various correction
circuits of V-T correction, color unevenness correction, color correction, etc, by
the panel driving/correction IC (IC5005).
In the V-T corrector block, the video signal input is converted into the appropriate
data adjusted in accordance with the LC panel characteristics of the lookup
table.
In the color unevenness corrector block, the correction data are secured for each
correction point in the screen split into 28 horizontal divisions by 17 vertical
divisions. Computer processing is carried out for the video data so that each split
screen can have the equalized correction data.
In the color corrector block, chromaticity conversion processing is carried out for
assuring the functions of picture management.
IC5005 is 3-wire serially controlled from IC3502 (Tightcell2).
*Wall color correction is carried out at the CSC (Color Space Converter) block of
IC3001.
The 12-bit_3 video signals output from IC5005 are put into D/A and level
conversion by the 12-phase decoding LC panel driver ICs (IC5501,5601,5701)
so that they are returned to the analog signals (12Vp-p) for the respective RGB
colors of 12 phases each. These analog signals are then fed to the LC panel.
The timing signal for LCD panel driving is set at IC5005 and fed to the LCD
panel. The common voltage for the LCD panel is fed to the respective panels of
RGB by the use of the appropriate terminals of the 12-phase decoding LCD
panel driver IC. Each common voltage is set via I
2
C control from IC5005.
