Renesas Hitachi H8S/2191, Руководство по оборудованию, Страница: 29 / 1065

Rev. 2.0, 11/00, page 2 of 1037
Table 1.1 Features
Item Specifications
CPU ■
General-register architecture
•
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or
eight 32-bit registers)
■
High-speed operation suitable for real-time control
•
Maximum operating frequency: 10 MHz/4 to 5.5 V
Operable by 32 kHz subclock
•
High-speed arithmetic operations
8/16/32-bit register-register add/subtract: 100 ns (10 MHz operation)
16
×
16-bit register-register multiply: 2000 ns (10 MHz operation)
32
÷
16-bit register-register divide: 2000 ns (10 MHz operation)
■
Instruction set suitable for high-speed operation
•
Sixty-five basic instructions
•
8/16/32-bit transfer/arithmetic and logic instructions
•
Unsigned/signed multiply and divide instructions
•
Powerful bit-manipulation instructions
■
CPU operating modes
•
Advanced mode: 16-Mbyte address space
Timer ■
Seven types of timer are incorporated
(1) Timer A
•
8-bit interval timer
•
Clock source can be selected among 8 types of internal clock of which
frequencies are divided from the system clock (
φ
) and subclock (
φ
SUB)
•
Functions as clock time base by subclock input
(2) Timer B
•
Functions as 8-bit interval timer or reload timer
•
Clock source can be selected among 7 types of internal clock or external
event input
(3) Timer J
•
Functions as two 8-bit down counters or one 16-bit down counter (reload
timer/event counter timer/timer output, etc., 5 types of operation modes)
•
Remote controlled transmit function
•
Take up/Supply Reel Pulse Frequency division