Renesas H8/38024 Series, Руководство по оборудованию

Страница: 406 / 661

Rev. 6.00, 08/04, page 376 of 628
9. Switching SCK
32
function
If pin SCK
32
is used as a clock output pin by SCI3 in synchronous mode and is then switched to a
general input/output pin (a pin with a different function), the pin outputs a low level signal for half
a system clock (
φ
) cycle immediately after it is switched.
This can be prevented by either of the following methods according to the situation.
a. When an SCK
32
function is switched from clock output to non clock-output
When stopping data transfer, issue one instruction to clear bits TE and RE to 0 and to set bits
CKE1 and CKE0 in SCR3 to 1 and 0, respectively. In this case, bit COM in SMR should be
left 1. The above prevents SCK
32
from being used as a general input/output pin. To avoid an
intermediate level of voltage from being applied to SCK
32
, the line connected to SCK
32
should
be pulled up to the V
CC
level via a resistor, or supplied with output from an external device.
b. When an SCK
32
function is switched from clock output to general input/output
When stopping data transfer,
(i) Issue one instruction to clear bits TE and RE to 0 and to set bits CKE1 and CKE0 in SCR3
to 1 and 0, respectively.
(ii) Clear bit COM in SMR to 0
(iii) Clear bits CKE1 and CKE0 in SCR3 to 0
Note that special care is also needed here to avoid an intermediate level of voltage from being
applied to SCK
32
.
10. Set up at subactive or subsleep mode
At subactive or subsleep mode, SCI3 becomes possible use only at CPU clock is
φ
w/2.
11. Oscillator use with serial communications interface (H8/38124 Group only)
When implementing the serial communications interface on the H8/38124 Group, the system
clock oscillator must be used. The on-chip oscillator should not be used in this case. See 4.2 (5),
on-chip oscillator selection method, for information on switching between the system clock
oscillator and the on-chip oscillator.