![background image](http://html2.mh-extra.com/html/racal-instruments/3152/3152_user-manual_3133316112.webp)
Specifications A-3
Internal
Internal programmable rate generator
System Delay
From External Trigger input to Waveform Output
Standard Waveforms
120ns + 2 sample clock periods ± 1 sample clock period
Arbitrary Waveforms
150ns + 2 sample clock periods ± 1 sample clock period
External Input from:
1) Front panel BNC, TTL compatible, positive slope
2) TTLTRG0-7, Synchronous Protocol, negative slope,
VXIbus TTLTRG trigger acceptor requirements:
Minimum pulse width (logic low - asserted) : 20 ns,
Minimum pulse width (logic high - unasserted) : 20 ns,
External Output to:
TTLTRG0-7, Synchronous Protocol, negative slope,
VXIbus TTLTRG trigger source requirements:
Minimum pulse width (logic low - asserted) : 30 ns
Minimum pulse width (logic high - unasserted) : 80ns
Maximum Clock Frequency : 12.5 MHz
Note: For the external trigger output, the trigger source is the
programmable Synchronous Signal.
For trigger operation when synchronized, the trigger circuit in the master module has control of the sample
clock for all modules. Therefore, the master module must be triggered before any slave can output it's
waveform.
Backplane Multi-Module Synchronization
Multiple Model 3152 modules may be synchronized. A master Model 3152 module provides the necessary
signals to slave Model 3152 modules to achieve synchronization. The signals required are sample clock
(distributed on ECLTRG0) and another signal (distributed on ECLTRG1). Phase offset is settable (in degrees)
for each slave module with respect to the master module output.
Phase Offset Resolution (P.O.R.)
360°/ Number of Points (min. # points = 10)
Phase Offset Range
0° to 360° - 2880/n, where n = number of points
Phase Accuracy
±[( 20 nS x 360°/PERIOD) + P.O.R.]
P.O.R. = phase offset resolution
PERIOD = 1/(output signal frequency)
Accuracy specified after PHAS:LOCK:NULL command
Jitter
None
Front Panel Indicator LED’s
Fail
Red - Power-up self-test failure
Access
Amber - Module addressed on VXIbus
PLL On
Amber - 3152 is locked to external signal
Содержание 3152
Страница 16: ...Getting Started 1 7 Figure 1 1 Segment 1 Sin x x Waveform Figure 1 2 Segment 2 Sine Waveform...
Страница 25: ...Configuring The Instrument 2 6 This page was intentionally left blank...
Страница 63: ...Using The Instrument 3 38 This page was intentionally left blank...
Страница 80: ...SCPI Command Reference 4 17 Figure 4 1 SCPI Status Registers...
Страница 121: ...Specifications A 12 This page was intentionally left blank...