Peritek VCD-V, Руководство пользователя

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Peritek
5-4 Programming On-board Devices and Memories
The CSR group consists of 4 registers:
Relative Register Section
Offset Mnemonic Description Reference
0 CSR General Control 5.2.1
4 LAR Line Address Register 5.2.2
8 XARADR A32 Address Match Register 5.2.3
DBRADR A16/A24 Address Match Register 5.2.4
C VECADR Interrupt Vector Address Register 5.2.5
The XAR/DBRADR and VECADR registers allow all VMEbus address
areas to which the board responds to be programmable except for the CSR
base address, which is (necessarily) jumper selected from 16 different
combinations (see Section 2.4.1).
Note
CSR group registers should be accessed as words, not long words,
because the high word will not read back useful data
.
5.2.1 Control/Status Register (CSR)
Table 5-1 CSR Bit Summary
Bit Mnemonic Function R/W Reset
15 spare was BIGEND, now reads back 0 no no
14 REVFLAG was r/w, now read back set no no
8-13 spare not used, reads back 0 no no
7 A24EN clear = A16 DBR access,
set = A24 DBR access
yes sysreset
6 CRTCON turns on the 34020 yes sysreset
5 MEMON enables the DBR addresses yes sysreset
4 XMEMON Enables 32-bit address response. yes sysreset
3 A1624SWAPEN Enables A16 and A24 swap mode yes sysreset
2 VINTEN VMEbus interrupt enable yes sysreset
1 A32SWAP Enables A32 swap mode yes sysreset
0 XARSEL Select XAR register access yes sysreset