NXP Semiconductors SAFE ASSURE FRDMGD3100HBIEVM, Руководство пользователя, Страница: 27 / 35

NXP Semiconductors
UM11134
FRDMGD3100HBIEVM half-bridge evaluation board
UM11134 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User guide Rev. 3 — 10 February 2020
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6.3.4 Pulse test
The Pulse test view allows a few simple waveforms to be applied to the PWM and
PWMALT pins, to evaluate with an IGBT.
For double pulse test, short-circuit test, and short-circuit test 2, it is recommended to
bypass dead time protection, as described in Section 4.4.4.2 "Configuring dead time
application in hardware" so the desired pulse is not distorted by the dead time protection.
For a repeating PWM waveform provided by a timer pin on the KL25Z, use the "PWM
Controls" to define frequency and duty cycle. The duty cycle is referenced to PMWH (for
example, when duty cycle is set at 80 %, PWMH = 80 %, PWML = 20 %).
Figure 18. Pulse test view
6.3.5 Daisy chain
When FRDMGD3100HBIEVM is configured for daisy-chain (see Section 4.4.4.1 "SPI
configuration options" ), both GD3100 devices can be addressed in the same SPI frame.
In daisy-chain configuration, both devices will be addressed by “SPI 0”. Neither device
will be addressed if “SPI 1” is selected.
Figure 19. Daisy chain view