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NXP Semiconductors
UM11134
FRDMGD3100HBIEVM half-bridge evaluation board
UM11134
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© NXP B.V. 2020. All rights reserved.
User guide
Rev. 3 — 10 February 2020
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Figure 14. SPIGen general view
Some general guidelines on SPIGen usage:
•
When attempting to change operating modes, configuration registers, or status mask
bits, ensure the CONFIG_EN bit in the MODE2 register is set to 1. Fault status bits can
be cleared without CONFIG_EN being set to 1.
•
On Mode, Configuration, and Status views, READ operations send identical back-
to-back commands so the response is obtained upon a single click of the “Read”
button. This is normal SPI operation, but is implemented this way for the end-user’s
convenience.
•
On Daisy Chain view, only one READ operation is performed per click. Two READ
operations must be performed to obtain response data.
•
On all views, WRITE operations are only performed once per click.
6.3.1 Mode registers
See
for an overview of control options available on the “Mode” view on
SPIGen. See GD3100 data sheet for a complete description of MODE1 and MODE2
registers and pin functionalities. The onboard flyback power supply providing VCC and
VEE for the HV domains can be enabled (default) or disabled in the event and external
supply or characteristic is desired.