N-180 Pulse Oximeter Service Manual
3-8
developed in the module. This calibration voltage (
VCALIN
2) is sent to the
analog to digital converter by buffer U21B.
Input Amplifier and Synchronous Detector
Refer to figure 3-4 and figure FO10-1 (sheet 3 of 7 and 4 of 7). The SAT signal
is continuously monitored, and the LED drives controlled to prevent
excessively high LED intensities, or the combination of LED intensity and
background light or energy, from overloading the sensor photodiode.
However, LED intensity must remain as high as possible to ensure optimal
signal-to-noise figure readings. To compensate for excessive light, device U7
and associated components sample the SAT signal, while the signal is still DC
coupled.
Initially LED intensity is set at maximum (56 milliamps) when power is
applied to the monitor by setting the ON /STDBY switch to ON . If the total
LED energy, or external light energy, or the combined LED energy and
external light energy, is excessive, the DC offset at the output of U8 could be
insufficient to prevent the SAT signal from going into the negative region of
the U8 operating range. To prevent the output of U8 from going negative, U7
monitors the negative excursion of the SAT signal.
Device U7
A
is a negative peak detector that produces a DC output
proportional to the maximum negative excursion of the SAT signal pulses. If
negative excursions of the saturation signal exceed –10 volts (indicating that
the current-to-voltage converter stage output is approaching the negative
supply voltage of –15 volts), the microprocessor that is monitoring the output
of
U
7
A
(
COMPARE
1) initiates action to reduce the output of the dual DAC that
controls the LED intensity. The microprocessor may reduce current through
only one of the LED s, if necessary.
The SAT signal is next coupled through C55 removing the DC offset. The
signal is then coupled to U13B, a band pass filter with a gain of 1, low-
frequency roll-off at 200 Hz, and high- frequency roll-off at 260 kHz. The filter
passes the SAT signal (2710.6 Hz) and effectively removes noise on either side
of the SAT signal frequency.
The signal then goes to a programmable gain circuit, which consists of 8-bit
DAC U9 and operational amplifier U13A. The DAC internal impedance
ladder is in series with the operational amplifier feedback loop. Amplifier gain
is controlled by micro processor adjustment of the DAC impedance over 255
discrete steps. The maximum gain of the circuit is one. The minimum gain is
1 divided by 255 or 0.004.
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