CHAPTER 3 CPU ARCHITECTURE
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User’s Manual U11302EJ4V0UM
3.3 Instruction Address Addressing
An instruction address is determined by program counter (PC) contents. The PC contents are normally
incremented (+1 for each byte) automatically according to the number of bytes of the instruction to be fetched each
time another instruction is executed. When a branch instruction is executed, the branch destination information
is set to the PC and the program is branched by the following addressing (for details of instructions, refer to the
78K/0 Series Instructions User’s Manual (U12326E)
).
3.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The displacement
value is treated as signed two’s complement data (–128 to +127) and bit 7 becomes a sign bit. In other words,
the range of branch in relative addressing is between –128 and +127 of the start address of the following instruction.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Illustration]
15
0
PC
+
15
0
8
7
6
S
15
0
PC
α
jdisp8
When S = 0, all bits of
α
are 0.
When S = 1, all bits of
α
are 1.
PC indicates the start address
of the instruction
after the BR instruction.
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