185
Description
• Compares the 32-bit data or 32-bit equivalent constant specified by S1 with one specified by S2
when the trigger turns ON. The compared result is stored in special internal relays R9009, and
R900A to R900C.
■
Flag condition
• Error flag (R9007):
Turns ON and keeps the ON state when the area specified using the index
modifier exceeds the limit. The error address is transferred to DT9017
and held. (See note below.)
• Error flag (R9008):
Turns ON for an instant when the area specified using the index modifier
exceeds the limit. The error address is transferred to DT9018. (See note
below.)
• The following table lists the conditions of carry flag (R9009), > flag (R900A), = flag (R900B),
and < flag (R900C), depending on the relative sizes of (S1+1, S1) and (S2+1, S2).
Notes:
Notes:
• Do not forget to program the same trigger as the
instruction to get the accurate comparison result.
Even if special relays are also programmed in
other parts of the program, the trigger prevents the
result of the other instruction from affecting them.
• You can also program the above using the
PSHS
,
RDS
, and
POPS
instructions.
Continued
• Special data registers DT9017 and DT9018 are available only for FP1s with CPU
version 2.7 or later. (All FP1s with a suffix “B” on the part number have this function.)
• When using special internal relays R9008, R9009, R900A, R900B, and R900C as
the flags for this instruction, be sure to program the flags at the address immediately
after the instruction.
• Refer to page 223, “8-3. Table of Special Internal Relays”, for details about error
flags.
(S1+1, S1) < (S2+1, S2)
(S1+1, S1) = (S2+1, S2)
(S1+1, S1) > (S2+1, S2)
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
↕
OFF
↕
(> flag) (= flag) (< flag) (carry flag)
R900A R900B R900C
R9009
Flag
Comparison between
(S1+1, S1) and (S2+1, S2)
“
↕
”: turns ON or OFF according to the conditions
6-3. Description of High-level Instructions
X0
F61 DCMP, DT0, DT100
X0
Y0
R900A
X0
Y1
R900B
X0
Y2
R900C
Trigger
Be sure to use the same trigger
as the trigger used to execute F61 (DCMP).
X0
F61 DCMP, DT0, DT100
Y0
R900A
Y1
R900B
Y2
R900C
Trigger
PSHS
RDS
POPS
[Ladder diagram]
[Boolean Non-ladder]
ST
X
0
PSHS
F61
DCMP
DT
0
DT
100
RDS
AN
R
900A
OT
Y
0
RDS
AN
R
900B
OT
Y
1
POPS
AN
R
900C
OT
Y
2
Содержание FP1
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