NAiS FP1, Руководство по оборудованию

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184
Outline Compares one 32-bit data with another.
Program example
■
Operands
■
Explanation of example
• Compares the content of data registers DT101 and DT100 with the content of data registers DT1 and DT0 when
trigger X0 turns ON.
The compared result is stored in special internal relays R900A, R900B, and R900C.
When (DT1 and DT0) > (DT101 and DT100), R900A turns ON and external output relay Y0 turns ON.
When (DT1 and DT0) = (DT101 and DT100), R900B turns ON and external output relay Y1 turns ON.
When (DT1 and DT0) < (DT101 and DT100), R900C turns ON and external output relay Y2 turns ON.
In this program example, the comparison will be performed only when X0 turns ON.
Note:
• When processing 32-bit data, the higher 16-bit areas (S1+1, S2+1) are automatically decided if the lower
16-bit areas (S1, S2) are specified.
e.g., S1+1 (higher) = DT1, S1 (lower) = DT0
S2+1 (higher) = DT101, S2 (lower) = DT100
Timer/Counter
EV
Relay
SV WR WY WX
Operand
S1
A A A A
A:
N/A: Not Available
Register
DT
A
IY IX
A N/A
H K
A A
Constant
Index
modifier
A
Index
register
Available
A
S2
A A A A A A N/A A A A A
F61
(DCMP)
32-bit data compare
Availability Step
9 All series
6-3. Description of High-level Instructions
S1
S2
32-bit equivalent constant or lower 16-bit area of 32-bit data to be compared
32-bit equivalent constant or lower 16-bit area of 32-bit data to be compared
Ladder Diagram
Boolean Non-ladder
Address Instruction
30
X0
F61 DCMP , DT 0 , DT100
S1 S2
Be sure to use the same trigger
as the trigger used to execute F61 (DCMP).
X0 Y0 R900A
40
X0 Y1 R900B
44
X0 Y2 R900C
48
Trigger
30
31
40
41
43
44
45
47
48
49
51
ST X 0
F 61 (DCMP)
DT 0
DT 100
ST X 0
AN R 900A
OT Y 0
ST X 0
AN R 900B
OT Y 1
ST X 0
AN R 900C
OT Y 2