LTC3882-1
20
Rev A
For more information
OPERATION
Soft-Start
The RUN pins are released for external control after the
part initializes and VINSNS is greater than the VIN_ON
threshold. If multiple LTC3882-1 ICs are used in an ap-
plication, shared RUN pins are held low until all units
initialize and VINSNS exceeds the VIN_ON threshold for
all devices. A common SHARE_CLK signal can also ensure
all connected devices use the same time reference for
initial start-up even if RUN pins cannot be shared due to
other design requirements. SHARE_CLK is not released
by each IC until the conditions for power sequencing have
been fully satisfied.
After a channel RUN pin rises above 2V and any specified
turn on delay (TON_DELAY) has expired, the LTC3882-1
performs an initial monotonic soft-start ramp on that chan-
nel. This is carried out with a digitally controlled ramp of
the regulated output voltage from 0V to the commanded
voltage set point over the programmed TON_RISE period,
allowing inrush current control. During the soft-start ramp,
the LTC3882-1 does not initiate PWM operation until the
commanded output exceeds the actual rail voltage. This
allows the regulator to start up into a pre-biased load
even when using gate drivers or power blocks that do not
support discontinuous operation. The soft-start feature
is disabled by setting the value of TON_RISE to any time
less than 0.25ms.
Time-Based Output Sequencing
The LTC3882-1 supports time-based on and off output
sequencing using a shared time reference (SHARE_CLK).
Following a valid qualified command to turn on, each output
is enabled after waiting its programmed TON_DELAY. This
can be used to sequence outputs in a prescribed order
that can be preprogrammed as needed without hardware
modification. Channel off-sequencing is accomplished in
a similar way with the TOFF_DELAY command.
Output Ramping Control
The LTC3882-1 supports synchronized output on and off
ramping control using a shared time reference (SHARE_
CLK). Power rail on and off relationships similar to those of
conventional analog tracking functions can be achieved by
using programmed delays and TON_RISE and TOFF_FALL
times. However, with LTC3882-1 digital control, on and
off ramping methods need not be the same, and ramping
configurations can be reprogrammed as needed without
hardware modification.
Programmable fault responses and fault sharing can
ensure that any desired time-based output sequencing
and ramping control is properly accomplished each time
the system powers up or down. Refer to the Applications
Information section for various LTC3882-1 hardware and
PMBus command configurations needed to fully support
synchronization for time-based sequencing and output
ramping when using multiple ICs.
Voltage-Based Output Sequencing
It is also possible to sequence outputs using cascaded
voltage events. To do this, the PGOOD status output from
one PWM channel can be used to control the RUN pin
of a downstream channel. This keeps the downstream
channel off unless acceptable output conditions exist on
the controlling channel.
Output Disable
Both PWM channels are disabled any time VINSNS is below
the VIN_OFF threshold. The power stages are immediately
shut off to stop the transfer of energy to the load(s) as
quickly as possible.
A PWM channel may also be disabled in response to certain
internal fault conditions, an external fault propagated into
a
FAULT
pin, or loss of SHARE_CLK. In these cases the
power stage is immediately shut off to stop the transfer
of energy to the load as quickly as possible. Refer to the
following Fault Detection and Handling section for ad-
ditional details related to fault recovery.
Each PWM channel can be disabled with a PMBus OPERA-
TION command at any time if enabled by ON_OFF_CONFIG.
This will force a controlled turn-off response with defined
delay (TOFF_DELAY) and ramp down rate (TOFF_FALL).
The controller will maintain the programmed mode of
operation for TOFF_FALL. In DCM, the controller will not
draw current from the load and fall time will be set by
output capacitance and load current.
