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LTC3882-1

Rev A

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The frequency and phase are also set by EEPROM values.

Assume that solution footprint or vertical clearance is an

issue, so operating frequency will need to be increased

in an effort to minimize inductor value (size). This choice

could also result from the need to have above average

transient performance, although efficiency may be re-

duced slightly. FREQUENCY_SWITCH is set to 1.0MHz.

As a 2-phase system, MFR_PWM_CONFIG_LTC3882-1

is programmed to 0x14 to put Channel 0 phase at 0° and

Channel 1 phase at 180°. This produces the lowest input

ripple possible with this configuration and allows this

output to synchronize with other rails via SHARE_CLK.
The design will plan on a nominal output ripple of 70% of

OUT

to minimize the magnetics volume, and the inductance

value is chosen based on this assumption. Each channel

supplies an average 20A to the output at full load, result-

ing in a ripple of 14A

P-P

. A 200nH inductor per phase

would create this peak-to-peak ripple at 1.0MHz. A Pulse

PA0513.22LT 210nH inductor with a DCR of 0.32mΩ

typical is selected. Setting IOUT_FAULT_LIMIT to 35A per

phase leaves plenty of headroom for transient conditions

while still adequately protecting against the rated inductor

saturation current of 45A at temperature.
For top and bottom power FETs, the 40V rated Infineon

BSC050N04LSG and BSC010N04LS are chosen, respec-

tively. These afford both low R

DS(ON)

and low gate charge

. Two of each of these could be paralleled to achieve

improved efficiency at full load, if desired.
The LTC4449 gate driver is chosen for its fast response

(13ns), suitable gate drive, V

capability (38V) and the

ease with which it can be interfaced to the LTC3882-1. Basic

three-state control, CCM operation, fast boost refresh, low

OUT

range and digital output voltage servo are selected

by programming MFR_PWM_MODE_LTC3882-1 to 0xC0

for both channels.
For input filtering, a 47μF SUNCON capacitor and four

22μF ceramic capacitors are selected to provide accept-

able AC impedance against the designed converter ripple

current. Four 470μF 9mΩ POSCAPs and two 100μF

ceramic capacitors are chosen for the output to maintain

supply regulation during severe transient conditions and

to minimize output voltage ripple.

A loop crossover frequency of 100kHz provides good

transient performance while still being well below the

switching frequency of the converter. The values of R29,

R30 and C25 to C27 were determined to produce a nomi-

nal system phase margin of about 65° at this bandwidth.
For the DCR sense filter network, R = 3.09k and C = 220nF

are chosen to match the L/DCR time constant of the induc-

tor. PolyPhase connections (I

AVG

, et al) are shown in the

schematic to ensure good output current sharing between

the two power stages.
External temperature sense will employ an accurate ∆V

method, and Q1 and Q2 serve to sense the temperature of

L1 and L2, respectively. These components will be located

immediately adjacent to their chokes and the 10nF filter

capacitors placed with the BJTs.
Resistor configuration is used on the ASEL

pins to pro-

gram PMBus address (MFR_ADDRESS) to 0x4C. Each

LTC3882-1 must be configured for a unique address.

Using both ASEL

pins to accomplish this programming

is recommended for simpliest in-system programming.

Check the selected address to avoid collision with global

addresses other any other specific devices. Identical

MFR_RAIL_ADDRESS can be set in EEPROM for both

channels to allow single-command control of common

rail parameters such as IOUT_OC_FAULT_LIMIT. The

LTC3882-1 also responds to 7-bit global addresses 0x5A

and 0x5B. MFR_ADDRESS and MFR_RAIL_ADDRESS

should not be set to either of these values.
PMBus connection (three signals), as well as shared

RUN control and fault propagation (

FAULT

) are provided.

SYNC can be used to synchronize other PWMs to this

rail if required.
Pull-ups are provided on all these shared open-drain signals

assuming a maximum 100pF line load and PMBus rate of

100kHz. These pins should not be left floating. Termina-

tion to 3.3V ensures the absolute maximum ratings for

the pins are not exceeded. All other operating parameters

such as soft start/stop and desired faults responses are

programmed via PMBus command values stored in internal

LTC3882-1 EEPROM.

APPLICATIONS INFORMATION

Содержание Analog Devices LTC3882-1

Страница 1: ...art Stop Sequencing Margining AVP and UV OV OC Limits n 3V VINSNS 38V 0 5V VOUT 5 25V n 0 5 Output Voltage Error n Programmable PWM Frequency or External Clock Synchronization from 250kHz to 1 25MHz n...

Страница 2: ...I O 28 Fault Logging 28 Factory Default Operation 31 Serial Interface 32 Serial Bus Addressing 32 Serial Bus Timeout 36 Serial Communication Errors 36 PMBus Command Summary 37 PMBus Commands 37 Data...

Страница 3: ...VOUT 87 STATUS_IOUT 87 STATUS_INPUT 88 STATUS_TEMPERATURE 88 STATUS_CML 88 STATUS_MFR_SPECIFIC 89 MFR_PADS_LTC3882 1 89 MFR_COMMON 90 MFR_INFO 90 CLEAR_FAULTS 90 Telemetry 91 READ_VIN 91 MFR_VIN_PEAK...

Страница 4: ...8 7 6 5 4 3 2 COMP0 TSNS0 TSNS1 VINSNS IAVG_GND PGOOD0 PWM0 SYNC SCL SDA IAVG1 FB1 COMP1 PGOOD1 PWM1 VCC VDD33 SHARE_CLK VDD25 PHAS_CFG FB0 I AVG0 I SENSE0 I SENSE0 V SENSE0 V SENSE0 V SENSE1 V SENSE...

Страница 5: ...ange 1 Set Point Resolution 0 6V VOUT 2 5V 0 6V VOUT 2 5V l 0 5 2 65 0 2 0 6875 0 5 V mV IVSENSE VSENSE Input Current VSENSE 5 5V VSENSE 0V 235 335 A A VLINEREG VCC Line Regulation No Output Servo 4 5...

Страница 6: ...PWM Duty Cycle 12 5 2 2 NVOUT VOUT Readback Resolution 244 V VOUT_TUE VOUT Total Unadjusted Readback Error 0 6V VOUT 5 5V Constant Load l 0 5 0 2 0 5 NISENSE IOUT Readback Resolution LSB Step Size at...

Страница 7: ...D0 PGOOD1 VDD33 0V FAULT0 FAULT1 SYNC SHARE_CLK 3 6V 0V RUN0 RUN1 5 5V 0V SCL SDA ALERT 5 5V l 1 5 5 1 5 5 A A A tRO PWMn Output Rise Time CLOAD 30pF 10 to 90 5 ns tFO PWMn Output Fall Time CLOAD 30pF...

Страница 8: ...ranteed by design characterization and correlation with statistical process controls Minimum retention applies only for devices cycled less than the minimum endurance specification EEPROM read command...

Страница 9: ...0 38821 G06 CH1 ISENSE OFFSET TO IDEAL V 400 400 300 200 100 300 200 100 0 9595 UNITS FROM 3 LOTS TA 40 C TJ 22 C CHO MASTER NUMBER OF ICs 3500 2500 1500 500 3000 2000 1000 0 38821 G07 CH1 ISENSE OFFS...

Страница 10: ...mV DIV IOUT1 10A DIV 100 s DIV 38821 G15 25 LOAD STEP VOUT 50mV DIV IO 10A DIV 200 s DIV 38821 G16 VOUT 10mV DIV VIN 2V DIV 7V 1 8V 200 s DIV 38821 G17 100 s DIV VOUT 10mV DIV IOUT 10A DIV 38821 G13 V...

Страница 11: ...0 40 20 0 PWM FREQUENCY kHz 500 2 500 1 499 9 499 7 500 0 499 8 499 6 499 5 38821 G23 TEMPERATURE C 40 60 80 120 100 20 40 20 0 FREQUENCY_SWITCH 500kHz RUN 2V DIV VOUT 1V DIV 5ms DIV TOFF_DELAY 10ms T...

Страница 12: ...1 2 3 5 OUTPUT CURRENT A 0 MEASUREMENT ERROR mA 0 2 4 20 38821 G26 2 4 8 5 10 15 6 8 6 Temperature ADC TUE SHARE_CLK Frequency vs Temperature IC Operating Current vs Temperature ACTUAL TEMPERATURE C...

Страница 13: ...al clock can be applied to this pin to synchronize the internal PWM chan nels If the LTC3882 1 is configured as a clock master this pin will also pull to ground at the selected PWM switching frequency...

Страница 14: ...nse Inputs These pins must still be properly connected on slave channels for accurate output current telemetry VSENSE0 VSENSE1 Pin36 Pin33 PositiveOutputVoltage Sense Inputs These pins must still be p...

Страница 15: ...URE PWM1 VINSNS BIAS AND HOUSEKEEPING 3 3V REGULATOR 2 5V REGULATOR MCU AND CUSTOM LOGIC TSNS1 VSENSE1 ISENSE1 IAVG1 TSNS0 PWM0 VSENSE0 ISENSE0 VINSNS VDD33 VCC PLL SYNC R_CONFIG SHARE_CLK PMBus RAM R...

Страница 16: ...s a PMBus compliant digital interface for monitoring and control of important power system parameters The chip operates from an IC power supplybetween3Vand13 2Vandisintendedforconversion from VIN betw...

Страница 17: ...ing edge modulation architecture doesnothaveaminimumon timerequirement Minimum duty cycle will be determined by performance limits of the external power stage The IC is also capable of active voltage...

Страница 18: ...OOP COMPENSATION NETWORK 2R RS VIN VOC0 CS L1 COUT VOUT MODE 36 IOUT_OC_FAULT_LIMIT VREV EA VC CA S GATE DRIVER PWM LOGIC OSCILLATOR RAMP CLOCK Q 0V R S MASTER ENABLE SLAVE ENABLE 39 SLAVE DETECT FEED...

Страница 19: ...ut 20 of its regulated value At that point the internal microcontroller begins initialization A PMBus RESTORE_USER_ALL or MFR_RESET command forces this same initialization The LTC3882 1 features an in...

Страница 20: ...on and off ramping control using a shared time reference SHARE_ CLK Powerrailonandoffrelationshipssimilartothoseof conventionalanalogtrackingfunctionscanbeachievedby usingprogrammeddelaysandTON_RISEan...

Страница 21: ...rnal bottom MOSFET synchronous rectifier when the induc tor current reaches approximately 0A preventing it from going substantially negative The external gate driver or power block must have short del...

Страница 22: ...gether and a small capacitor 50pF to 200pF between IAVG and IAVG_GND stores a voltage corresponding to the average master phase output current The difference in this aver age and the instantaneous pha...

Страница 23: ...ng an on chip diode with a VBE measurement and calculation Resistor Configuration Pins Sixinputpinscanbeusedtoconfigurekeyoperatingparam eters with selected 1 resistors arranged between VDD25 and GND...

Страница 24: ...Information section for equations to predict retention degradation due to elevated operating temperatures See the Applications Information section or contact the factoryfordetailsonefficientin system...

Страница 25: ...IOUT Faults The LTC3882 1 measures average IOUT from the voltage acrosstheISENSEpins takingintoaccountthesenseresistor or DCR value and its associated temperature coefficient BothareprovidedbyPMBusco...

Страница 26: ...pecified by the MFR_RETRY_DELAY command This avoids damage to external regulator components caused by repetitive rapid power cycling No retry is attempted for a latch off fault response In the latch o...

Страница 27: ...3 2 1 0 PAGED STATUS_IOUT 7 6 5 4 3 2 1 0 PAGED MASKABLE DESCRIPTION General Fault or Warning Event General Non Maskable Event Dynamic Status Derived from Other Bits Yes No No No GENERATES ALERT Yes Y...

Страница 28: ...LEAR_FAULTS RESTORE_USER_ALL or MFR_RE SET Command Is Issued The Related Status Bit Is Written to a One The Faulted Channel Is Properly Commanded Off and Back On IC Supply Power Is Cycled For autonomo...

Страница 29: ...since last power on or CLEAR_PEAKS command 7 0 14 MFR_IOUT_PEAK PAGE 0 15 8 L11 15 Peak READ_IOUT on Channel 0 since last power on or CLEAR_PEAKS command 7 0 16 MFR_IOUT_PEAK PAGE 1 15 8 L11 17 Peak R...

Страница 30: ...x16 Under temperature 0x17 VIN_OV 0x1A Internal temperature 0xFF MFR_FAULT_LOG_STORE Table 4 Fault Log Event Record DATA BITS FORMAT RECORD BYTE INDEX READ_VOUT PAGE 0 15 8 L16 0 7 0 1 READ_VOUT PAGE...

Страница 31: ...g Limit 6 3 V Input Voltage ON Threshold 6 5 V Input Voltage OV Fault Limit 15 5 V Input Voltage OV Fault Response Latch off Soft Start Time 8 with no delay ms Maximum Start Up Time TMAX 10 ms TMAX Fa...

Страница 32: ...3882 1 to a PMBus system This specification can be found at http www pmbus org specs html TheLTC3882 1usesthefollowingstandardserialinterface protocolsdefinedintheSMBusandPMBusspecifications Quick Com...

Страница 33: ...sses is also strongly discouraged Device addressing is the most common means used by a busmastertocommunicatewithanLTC3882 1 Thevalue of the device address is set by the combination of ASEL pin progra...

Страница 34: ...TA BYTE LOW 8 DATA BYTE HIGH PEC 8 8 1 1 1 1 1 1 1 1 Sr 1 A 1 Rd A SLAVE ADDRESS COMMAND CODE DATA BYTE LOW Wr A A A P 38821 F09 S 7 8 8 1 DATA BYTE HIGH 8 1 1 1 1 1 1 A SLAVE ADDRESS COMMAND CODE SLA...

Страница 35: ...AVE ADDRESS COMMAND CODE SLAVE ADDRESS Wr A A Sr S 7 8 7 1 1 BYTE COUNT N 8 1 1 1 1 1 1 A Rd A A DATA BYTE 1 8 DATA BYTE 2 8 1 1 A A P NA 38821 F16 DATA BYTE N PEC 8 8 1 1 1 SLAVE ADDRESS COMMAND CODE...

Страница 36: ...s will the timeout period be less than the tTIMEOUT specification 25ms minimum The LTC3882 1 supports the full PMBus frequency range of 10kHz to 400kHz Serial Communication Errors The LTC3882 1 suppor...

Страница 37: ...e are implicitly not supported by the LTC3882 1 All commands from 0xD0 through 0xFF not listed in this table are implicitly reservedbythemanufacturer TheLTC3882 1mayexecute additional commands not lis...

Страница 38: ...Y Reg l see CMD details 98 VOUT_MODE 0x20 Voltage related format Linear and exponent R Byte Y Reg 0x14 2 12 79 VOUT_COMMAND 0x21 Nominal VOUT value R W Word Y L16 V l 1 0V 0x1000 79 VOUT_MAX 0x24 Max...

Страница 39: ...overvoltage fault limit R W Word N L11 V l 15 5V 0xD3E0 78 VIN_OV_FAULT_RESPONSE 0x56 VIN overvoltage fault response R W Byte Y Reg l 0x80 94 VIN_UV_WARN_LIMIT 0x58 VIN undervoltage warning limit R W...

Страница 40: ...l number R String N ASC LTC3882 1 103 MFR_SERIAL 0x9E Device serial number R Block N ASC 103 LTC3882 1 Custom Commands MFR_VOUT_MAX 0xA5 Maximum value of any VOUT related command R Word Y L16 V 5 6V 0...

Страница 41: ...xE7 Manufacturer code representing the LTC3882 1 R Word N Reg 0x424X 103 MFR_FAULT_LOG_STORE 0xEA Force transfer of fault log from operating memory to EEPROM Send Byte N 103 MFR_FAULT_LOG_CLEAR 0xEC C...

Страница 42: ...0A 3 Transition losses apply only to the topside MOSFET and becomesignificantwhenoperatingathighinputvoltages typically above 12V This loss can be minimized by choosing a driver with very low drive re...

Страница 43: ...io and the FET circuit position main or synchronous switch A much smaller and lower input capacitance MOSFET should be used for the top MOSFET in applications that have an output voltage that is less...

Страница 44: ...tcouldexceedthemaximum voltage rating of the MOSFET If this ringing cannot be avoided and exceeds the maximum rating of the device choose a higher voltage rated MOSFET MOSFET Driver Selection Gate dri...

Страница 45: ...rated electrolyticcapacitorscanbeusedasinputcapacitors but each has drawbacks Ceramics have high voltage coeffi cients of capacitance and may have audible piezoelectric effects tantalumsneedtobesurge...

Страница 46: ...rom which the PWM controller derives the required output duty cycle To speedupovershootrecoverytime themaximumpotential at the COMP pin is internally clamped Unlike many regulators that use a transcon...

Страница 47: ...he circuitbranches RSENSE willbereplacedwithadeadshort ifDCRsensingisused Formaximumefficiency theswitch Theexternalinductor outputcapacitorcombinationmakes a more significant contribution to loop beh...

Страница 48: ...ch they are routed Avoid high frequency switching signals and ideally shield with ground planes Locate any filter component on these traces next to the LTC3882 1 and not at the Kelvin sense location H...

Страница 49: ...oefficient of the inductor s DCR is typically high like copper Again consultthemanufacturer sdatasheet TheLTC3882 1can adjust for this non ideality if the correct MFR_IOUT_CAL_ GAIN_TC value is progra...

Страница 50: ...information about parasitic inductance In the absence of data measure the voltage drop directly across the sense resistor to extract the magnitude of the ESL step and the following equation to determ...

Страница 51: ...of the fall time If TOFF_FALL is shorter than the time required to discharge the load capacitance the output will not reach 0V In this case the power stage will still be commanded off at the end of TO...

Страница 52: ...LTC digital power products two signals should be shared between all controlling ICs SHARE_CLK and RUN CONTROL pin on LTC297x products This facilitates synchronized rail sequencing on or off based on...

Страница 53: ...not toggle repeatedly at lower values of TON_RISE FALLduetonoiseonVOUT Ifunwantedtransi tions still occur on PGOOD due to noise or longer rise fall settings place a capacitor to ground on the PGOOD p...

Страница 54: ...1 will adjust the regulated output voltage based on its related ADC voltage reading Every 90ms the digital servo loop will step the LSB of the DAC nominally 1 375mV or 0 6875mV depending on the voltag...

Страница 55: ...operat ing at a known output current of at least 20 of full load READ_IOUT The necessary correction which will typi cally be less than several percent of the no load output voltage is calculated as VO...

Страница 56: ...with a value between 100pF and 200pF should be placed between IAVG and IAVG_GND This capacitance can be distributed across LTC3882 1 devices pins for improved noise immunity All IAVG_GND pins for a Po...

Страница 57: ...MP0 COMP1 VSENSE0 VSENSE1 VSENSE0 VSENSE1 GND IAVG_GND SHARE_CLK LTC3882 1 0 120 IAVG0 IAVG1 SYSTEM ON OFF BOTH ICs SAME DEFAULT FREQUENCY SWITCH 3 PHASE SENSE 1 PHASE SENSE VINSNS FB0 FB1 RUN0 RUN1 F...

Страница 58: ...VINSNS FB0 FB1 RUN0 RUN1 FAULT0 FAULT1 SYNC COMP0 COMP1 VSENSE0 VSENSE1 VSENSE0 GND IAVG_GND LTC3882 1 45 225 IAVG0 IAVG1 SYSTEM ON OFF VINSNS FB0 FB1 RUN0 RUN1 FAULT0 FAULT1 SYNC COMP0 COMP1 VSENSE0...

Страница 59: ...t handling across phases Because the LTC3882 1 current sharing loop operates by matching sensed voltage it is important that well matched sense elements be used in the system Current matching paramete...

Страница 60: ...906 has a recommended value inthiscommandofapproximatelyMFR_TEMP_1_GAIN 0 991 based on the ideality factor of 1 01 Simply invert the ideality factor to calculate the MFR_TEMP_1_GAIN Different manufact...

Страница 61: ...09 500 24 9 7 32 450 24 9 5 76 400 24 9 4 32 350 30 1 3 57 300 30 1 1 96 250 Open 0 External SYNC Only Note that if SYNC pins are shared between LTC3882 1s only one SYNC output should be enabled All...

Страница 62: ...re shorted If the internal 3 3V LDO is used it can supply a peak current of 85mA including internal consumption and the VDD33 regulatoroutputmustbebypassedtoGNDwithalowESR X5R or X7R ceramic capacitor...

Страница 63: ...617 10 5 1 398 1 403 1 66 indicating the effect is the same as operating the device at 125 C for 10 1 66 16 6 hours resulting in a retention derating of 6 6 hours Configuring Open Drain Pins The LTC38...

Страница 64: ...fetching converting to internal format and executing commands so marked for processing Some computationally intensive commands e g timing parameters temperatures voltages and currents have internal p...

Страница 65: ...tten It is a good practice to always check for a partial fault log at power up if fault logging is enabled bit 7 of MFR_CONFIG_ALL_LTC3882 1 LTpowerPlay An Interactive Digital Power GUI LTpowerPlay is...

Страница 66: ...ate remote diagnostics control and reprogramming of the LTC3882 1 while the host system is fully operational permitting very flexible in system debugging Ifthesystemsupplyisrestoredwhilepowerisstillap...

Страница 67: ...Bus PMBus CONTROLLER SCL GND LTC3882 1 VCC VDD33 SDA SCL GND LTC3882 1 10k TP0101K VDD25 IN GND 400mV REFERENCE LT6703 2 OUT 10k 102k 10k 10k 2N2002 Figure 48 DC1613 Connections VDD33 Supply GND ENBA...

Страница 68: ...st the designed converter ripple current Four 470 F 9m POSCAPs and two 100 F ceramic capacitors are chosen for the output to maintain supply regulation during severe transient conditions and to minimi...

Страница 69: ...TE is used to send a non paged command the Page Number byte is ignored This command uses Write Block protocol An example of the PAGE_PLUS_WRITE command with PEC sending a com mand that has two data by...

Страница 70: ...SLAVE ADDRESS PAGE_PLUS COMMAND CODE BLOCK COUNT 2 W A A S 7 8 8 1 PAGE NUMBER 8 1 1 1 1 1 A A COMMAND CODE 8 1 A SLAVE ADDRESS BLOCK COUNT 2 LOWER DATA BYTE R A A Sr 7 8 8 1 UPPER DATA BYTE 8 1 1 1...

Страница 71: ...the PMBus device address for this unit right justified Setting this command to a value of 0x80 disables device level addressing The GLOBAL device addresses 0x5A and 0x5B cannot be disabled The LTC388...

Страница 72: ...MD CODE DESCRIPTION TYPE PAGED DATA FORMAT UNITS NVM DEFAULT VALUE ON_OFF_CONFIG 0x02 RUN pin and PMBus on off command configuration R W Byte Y Reg l 0x1E OPERATION 0x01 On off and margin control R W...

Страница 73: ...d Margin operations that ignore faults are not supported by the LTC3882 1 Supported Values VALUE MEANING 0xA8 Margin high 0x98 Margin low 0x80 On VOUT back to nominal even if bit 3 of ON_OFF_CONFIG is...

Страница 74: ...PLL Unlocked status may be reported after changing the value of this command until the new frequency is established Supported Frequencies VALUE PWM FREQUENCY TYPICAL 0x0A71 1 25MHz 0x03E8 1MHz 0x0384...

Страница 75: ...a and assert a BUSY fault Supported Values BIT MEANING 7 Reserved must write as 0 6 Reserved must write as 0 5 Reserved 4 SHARE_CLK configuration 0 SHARE_CLK continuously enabled once VINSNS VIN_ON af...

Страница 76: ...ycle control 0 No special control Device attempts to follow on off commands exactly as issued 1 Output is immediately disabled if commanded back on while waiting for TOFF_DELAY or TOFF_FALL to expire...

Страница 77: ...tage measured by the ADC as T G 1 35 VTSNSn O 4 3e 3 25 For both equations G MFR_TEMP_1_GAIN 2 14 and O MFR_TEMP_1_OFFSET Supported Values BIT MEANING 7 Output voltage range select 0 Maximum VOUT 5 25...

Страница 78: ...g is disabled until the input exceeds the input startup threshold value set by the VIN_ON command and the unit has been enabled If the VIN_UV_WARN_LIMIT is then exceeded the device Sets the INPUT Bit...

Страница 79: ...UT_UV_FAULT_LIMIT 0x44 VOUT undervoltage fault limit R W Word Y L16 V l 0 9V 0x0E66 Related commands OPERATION STATUS_WORD STATUS_VOUT SMBALERT_MASK READ_VOUT MFR_VOUT_PEAK READ_POUT VOUT_OV_FAULT_ RE...

Страница 80: ...IMIT value as full scale current for AVP If MFR_VOUT_AVP is non zero VOUT_COMMAND sets the maximum no load output voltage and servo mode for that channel is automatically disabled Setting MFR_VOUT_AVP...

Страница 81: ...The VOUT_UV_WARN_LIMIT command sets the value in volts of the output voltage measured by the ADC at the VSENSE pins that causes an output undervoltage warning If the VOUT_UV_WARN_LIMIT is exceeded th...

Страница 82: ...data bytes in Linear_5s_11s format IOUT_OC_WARN_LIMIT TheIOUT_OC_WARN_LIMITcommandsetsthevalueoftheoutputcurrentmeasuredbytheADC inamperes thatcauses anoutputovercurrentwarning Toprovidemeaningfulresp...

Страница 83: ...tside of this range Values of TON_RISE less than 0 25ms or resulting slopes greater than 4V ms will result in an output step to the commanded voltage limited only by PWM analog loop response This comm...

Страница 84: ...LL The TOFF_FALL command sets the time in milliseconds from the end of TOFF_DELAY until the output voltage is com manded fully to zero The part attempts to linearly reduce the commanded output voltage...

Страница 85: ...N_LIMIT The OT_WARN_LIMIT command sets the value of sensed external temperature in degrees Celsius which causes an overtemperature warning If the OT_WARN_LIMIT is exceeded the device Sets the TEMPERAT...

Страница 86: ...y may be cleared by writing a 1 to their bit position in the STATUS_BYTE in lieu of a CLEAR_FAULTS command This command has one data byte STATUS REPORTING COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED...

Страница 87: ...S_VOUT command returns one byte of VOUT status information STATUS_VOUT Message Contents BIT MEANING 7 VOUT overvoltage fault 6 VOUT overvoltage warning 5 VOUT undervoltage warning 4 VOUT undervoltage...

Страница 88: ...t supported LTC3882 1 returns 0 4 External undertemperature fault 3 0 Not supported LTC3882 1 returns 0 ALERT can be asserted if any supported bits are set Any supported bit may be cleared by writing...

Страница 89: ...in lieu of a CLEAR_FAULTS command This command has one data byte MFR_PADS_LTC3882 1 The MFR_PADS_LTC3882 1 command provides status of the LTC3882 1 digital I O and control pins in addition to general...

Страница 90: ...he EEPROM user space 1 No corrections have been made in the EEPROM user space 4 0 Reserved EEPROM ECC status is updated after each RESTORE_USER_ALL or RESET command a power on reset or an EEPROM bulk...

Страница 91: ...last MFR_CLEAR_PEAKS R Word N L11 C READ_DUTY_CYCLE 0x94 Measured commanded PWM duty cycle R Word Y L11 READ_FREQUENCY 0x95 Measured PWM input clock frequency R Word Y L11 kHz MFR_CLEAR_PEAKS 0xE3 Cl...

Страница 92: ...reports the output power in watts The value is calculated from the product of the most recent correlated output voltage and current readings This read only command has two data bytes in Linear_5s_11s...

Страница 93: ...and current consumption of the LTC3882 1 itself This read only command has two data bytes in Linear_5s_11s format READ_FREQUENCY The READ_FREQUENCY command returns the switching frequency supplied to...

Страница 94: ...ils MFR_FAULT_PROPAGATE_ LTC3882 1 0xD2 Configure status propagation via FAULTn pins R W Word Y Reg l 0x6993 MFR_FAULT_RESPONSE 0xD5 PWM response when FAULTn pin is low R W Byte Y Reg l 0xC0 MFR_FAULT...

Страница 95: ...e The output is commanded off then on by the RUN pin or OPERATION command The device receives a RESTORE_USER_ALL command The device receives an MFR_RESET command IC supply power is cycled 00 The LTC38...

Страница 96: ...o operate indefinitely with the normal hardware response described in the Operation section 10 The LTC3882 1 continues operating with the normal hardware response for the delay time specified by bits...

Страница 97: ...by Asserting ALERT Unless Masked This command has one data byte MFR_OT_FAULT_RESPONSE The MFR_OT_FAULT_RESPONSE command instructs the device on what action to take in response to an internal overtempe...

Страница 98: ...shuts down immediately disables the output and responds according to the retry setting in bits 5 3 11 Not supported Writing this value will generate a CML fault 5 3 Retry setting 000 110 The LTC3882...

Страница 99: ...MBALERT_MASK Default Setting Refer Also to Figure 2 STATUS RESISTER ALERT Mask Value MASKED BITS STATUS_VOUT 0x00 None STATUS_IOUT 0x00 None STATUS_TEMPERATURE 0x00 None STATUS_CML 0x00 None STATUS_IN...

Страница 100: ...xceeded 3 Reserved 2 IOUT_OC_FAULT_LIMIT exceeded 1 VOUT_UV_FAULT_LIMIT exceeded 0 VOUT_OV_FAULT_LIMIT exceeded This command has two data bytes MFR_FAULT_RESPONSE The MFR_FAULT_RESPONSE command instru...

Страница 101: ...well as peak values of these quantities are stored in a continuously updated buffer in RAM The operation is similar to a strip chart recorder When a fault occurs the contents are written into EEPROM...

Страница 102: ...STORE_USER_ALL is executed immediately and MFR_FAULT_LOG_STORE is executed after the IC temperature drops below 125 C Refer to Table 4 for details of fault log contents Using any command that writes d...

Страница 103: ...D DATA FORMAT UNITS NVM DEFAULT VALUE MFR_ID 0x99 Manufacturer identification R String N ASC LTC MFR_MODEL 0x9A LTC model number R String N ASC LTC3882 1 MFR_SERIAL 0x9E Device serial number R Block N...

Страница 104: ...4 7 F V CC 25 C17 1 F V DD25 V DD25 22 C16 2 2 F V DD33 V CC V DD25 V DD33 24 C8 100nF C4 47 F VINSNS 4 R5 1 V OUT0_CFG ASEL1 ASEL0 V OUT1_CFG FREQ_CFG PHAS_CFG I AVG1 I AVG0 R14 1 37k R35 5 76k R34 2...

Страница 105: ...F C124 1 0 F C117 100 F 2 C120 470 F 3 C107 2 2 F COMP1 CSB CSB C110 47 F R21 100k C111 22 F V INB V INA 7V 4 V IN V CC V DD25 V DD25 V DD33 V DD25 V DD33 VINSNS CSA CSA PWMA PWM0 PWMB PWM1 V OUT 1 5...

Страница 106: ...DE IF PRESENT 5 EXPOSED PAD SHALL BE SOLDER PLATED 6 SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK SEE NOTE 6 PIN 1 NOTCH R 0 45 OR 0 35 45 CHAMFER...

Страница 107: ...r its use nor for any infringements of patents or other rights of third parties that may result from its use Specifications subject to change without notice No license is granted by implication or oth...

Страница 108: ...gital Power Supply Manager with EEPROM Controls and Monitors Four Outputs 16 Bit ADC Differential Inputs with Fault Logging LTC3774 Dual Multiphase Current Mode Synchronous Controller for Sub Milliohm...

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