LTC3882-1
32
Rev A
For more information
OPERATION
Serial Interface
The LTC3882-1 has a PMBus compliant serial interface that
can operate at any frequency between 10kHz and 400kHz.
The LTC3882-1 is a bus slave device that communicates
bidirectionally with a host (master) using standard PMBus
protocols. The Timing Diagram found earlier in this docu-
ment, along with related Electrical Characteristics table
entries, define the timing relationships of the SDA and SCL
bus signals. SDA and SCL must be high when the bus is
not in use. External pull-up resistors or current sources
are required on these lines.
PMBus, an incremental extension of the SMBus standard,
offers more robust operation than a 2-wire I
2
C interface. In
addition to adding a protocol layer to improve interoper-
ability and facilitate reuse, PMBus supports bus timeout
recovery for system reliability, optional packet error check-
ing to ensure data integrity, and peripheral hardware alerts
for system fault management. In general, a programmable
device capable of functioning as an I
2
C bus master can be
configured for PMBus management with little or no change
to hardware. However, not all I
2
C controllers support repeat
start (restart) required for PMBus reads.
For a description of the minor extensions and exceptions
PMBus makes to the SMBus standard, refer to PMBus
Specification Part I Revision 1.2 Paragraph 5 on Transport.
For a description of the differences between SMBus and
I
2
C, refer to System Management Bus (SMBus) Specifi-
cation Version 2.0 Appendix B on Differences Between
SMBus and I
2
C.
The user is encouraged to reference Part I of the latest
PMBus Power System Management Protocol Specifica-
tion to understand how to interface the LTC3882-1 to a
PMBus system. This specification can be found at http://
www.pmbus.org/specs.html.
The LTC3882-1 uses the following standard serial interface
protocols defined in the SMBus and PMBus specifications:
• Quick Command
• Send Byte
• Write Byte
• Write Word
• Read Byte
• Read Word
• Block Read
• Block Write – Block Read Process Call
• Alert Response Address
The LTC3882-1 does not require PEC for Quick Command
under any circumstances. The LTC3882-1 also supports
group command protocol (GCP) as required by PMBus
specification Part I, section 5.2.3. GCP is used to send com-
mands to more than one PMBus device in one continuous
transmission. It should not be used with commands that
require the receiving device to respond with data, such as
a STATUS_BYTE command. Refer to Part I of the PMBus
specification for additional details on using GCP.
All LTC3882-1 message transmission types allow for packet
error checking. The later section on Serial Communication
Errors provides more detail on packet error checking.
Figure 4 to Figure 20 illustrate these protocols. Figure 3
provides a key to the protocol diagrams. Not all protocol
elements will be present in every data packet. For instance,
not all packets are required to include the packet error
code. A number shown above a field in these diagrams
indicates the number of bits in that field. All data transfers
are initiated by the present bus master regardless of how
many times data direction flow may change during the
subsequent transmission. The LTC3882-1 never functions
as a bus master.
This device includes handshaking features to ensure ro-
bust system communication. Please refer to the PMBus
Communication and Command Processing section in
Applications Information for more details.
Serial Bus Addressing
The LTC3882-1 supports four types of serial bus ad-
dressing:
• Global Bus Addressing
• Power Rail Addressing
• Individual Device Addressing
• Page+ Channel Addressing
