All digital I/O on the U3 have 3 possible states: input, output-high, or output-low. Each bit of I/O can be configured individually.
When configured as an input, a bit has a ~100 kΩ pull-up resistor to 3.3 volts (all digital I/O are 5 volt tolerant). When configured as
output-high, a bit is connected to the internal 3.3 volt supply (through a series resistor). When configured as output-low, a bit is
connected to GND (through a series resistor).
The fact that the digital I/O are specified as 5-volt tolerant means that 5 volts can be connected to a digital input without problems
(see the actual limits in the specifications in Appendix A). If 5 volts is needed from a digital output, consider the following solutions:
In some cases, an open-collector style output can be used to get a 5V signal. To get a low set the line to output-low, and to
get a high set the line to input. When the line is set to input, the voltage on the line is determined by a pull-up resistor. The
U3 has an internal ~100k resistor to 3.3V, but an external resistor can be added to a different voltage. Whether this will work
depends on how much current the load is going to draw and what the required logic thresholds are. Say for example a 10k
resistor is added from EIO0 to VS. EIO0 has an internal 100k pull-up to 3.3 volts and a series output resistance of about 180
ohms. Assume the load draws just a few microamps or less and thus is negligible. When EIO0 is set to input, there will be
100k to 3.3 volts in parallel with 10k to 5 volts, and thus the line will sit at about 4.85 volts. When the line is set to output-low,
there will be 180 ohms in series with the 10k, so the line will be pulled down to about 0.1 volts.
The surefire way to get 5 volts from a digital output is to add a simple logic buffer IC that is powered by 5 volts and
recognizes 3.3 volts as a high input. Consider the CD74ACT541E from TI (or the inverting CD74ACT540E). All that is
needed is a few wires to bring VS, GND, and the signal from the LabJack to the chip. This chip can level shift up to eight
0/3.3 volt signals to 0/5 volt signals and provides high output drive current (+/-24 mA).
Note that the 2 DAC channels on the U3 can be set to 5 volts, providing 2 output lines with such capability.
The power-up condition of the digital I/O can be configured by the user with the "Config Defaults" option in LJControlPanel. From
the factory, all digital I/O are configured to power-up as inputs. Note that even if the power-up default for a line is changed to
output-high or output-low, there is a delay of about 5 ms at power-up where all digital I/O are in the factory default condition.
If you want a floating digital input to read low, an external pull-down resistor can be added to overpower the internal 100k pull-up.
4.7k to 22k would be a typical range for this pull-down, with 10k being a solid choice for most applications.
The low-level Feedback function (Section 5.2.5) writes and reads all digital I/O. For information about using digital I/O under the
Windows LabJackUD driver, see Section 4.3.5. See Section 3.1 for timing information.
Many function parameters contain specific bits within a single integer parameter to write/read specific information. In particular,
most digital I/O parameters contain the information for each bit of I/O in one integer, where each bit of I/O corresponds to the same
bit in the parameter (e.g. the direction of FIO0 is set in bit 0 of parameter FIODir). For instance, in the low-level function ConfigU3,
the parameter FIODirection is a single byte (8 bits) that writes/reads the power-up direction of each of the 8 FIO lines:
if FIODirection is 0, all FIO lines are input,
if FIODirection is 1 (2
0
), FIO0 is output, FIO1-FIO7 are input,
if FIODirection is 5 (2
0
+ 2
2
), FIO0 and FIO2 are output, all other FIO lines are input,
if FIODirection is 255 (2
0
+ … + 2
7
), FIO0-FIO7 are output.
2.8.1 - Typical Digital I/O Connections
2.8.1.1 - Input: Driven Signals
The most basic connection to a U3 digital input is a driven signal, often called push-pull. With a push-pull signal the source is
typically providing a high voltage for logic high and zero volts for logic low. This signal is generally connected directly to the U3
digital input, considering the voltage specifications in Appendix A. If the signal is over 5 volts, it can still be connected with a series
resistor. The digital inputs have protective devices that clamp the voltage at GND and VS, so the series resistor is used to limit the
current through these protective devices. For instance, if a 24 volt signal is connected through a 22 kΩ series resistor, about 19
volts will be dropped across the resistor, resulting in a current of 0.9 mA, which is no problem for the U3. The series resistor should
be 22 kΩ or less, to make sure the voltage on the I/O line when low is pulled below 0.8 volts.
The other possible consideration with the basic push-pull signal is the ground connection. If the signal is known to already have a
common ground with the U3, then no additional ground connection is used. If the signal is known to not have a common ground
with the U3, then the signal ground can simply be connected to U3 GND. If there is uncertainty about the relationship between
signal ground and U3 ground (e.g. possible common ground through AC mains), then a ground connection with a ~10 Ω series
resistor is generally recommended (see Section 2.6.3.4).
Figure 2.8-1. Driven Signal Connection To Digital Input
Figure 2.8-1 shows typical connections. Rground is typically 0-100 Ω. Rseries is typically 0 Ω (short-circuit) for 3.3/5 volt logic, or
22 kΩ (max) for high-voltage logic. Note that an individual ground connection is often not needed for every signal. Any signals
powered by the same external supply, or otherwise referred to the same external ground, should share a single ground connection
to the U3 if possible.
When dealing with a new sensor, a push-pull signal is often incorrectly assumed when in fact the sensor provides an open-collector
signal as described next.
2.8.1.2 - Input: Open-Collector Signals
Open-collector (also called open-drain or NPN) is a very common type of digital signal. Rather than providing 5 volts and ground,
like the push-pull signal, an open-collector signal provides ground and high-impedance. This type of signal can be thought of as a
switch connected to ground. Since the U3 digital inputs have a 100 kΩ internal pull-up resistor, an open-collector signal can
generally be connected directly to the input. When the signal is inactive, it is not driving any voltage and the pull-up resistor pulls the
digital input to logic high. When the signal is active, it drives 0 volts which overpowers the pull-up and pulls the digital input to logic
low. Sometimes, an external pull-up (e.g. 4.7 kΩ from Vs to digital input) will be installed to increase the strength and speed of the
logic high condition.
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