Keysight U8903B, Руководство по обслуживанию

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4 Performance Verification for Digital Generator and Digital Analyzer
68 Keysight U8903B Service Guide
j Record the average Master Clock Rate, F
measure
in the “ Test record for DSI master
clock output frequency accuracy verification ” on page 128 .
k Compute the master clock error using the following equation. MCLK is the master
clock rate calculated where MCLK = MUL
×
Sampling Rate (Hz).
Δ F
error
ppm = [(F
measure
– MCLK) / MCLK] × 1000000
Balanced output level accuracy verification
This test measures the balanced output level accuracy on the balanced digital audio output
of the U8903B using the Keysight DSO8064A oscilloscope to ensure that it is within the
published specification.
1 Connect the Keysight DSO8064A oscilloscope input channel 1 and 2 to the U8903B
balanced digital output channel with the 55
Ω termination using the XLR female to two
BNC male AES cable with separated + and – output lines as shown in Figure 4-2 .
Figure 4-2 DSO8064A oscilloscope to U8903B balanced digital output for balanced output level accuracy
verification
2 Configure the DSO8064A oscilloscope as follows:
– Trigger mode: Edge
– Edge trigger slope: Positive
– Channel 1 offset: 0
– Channel 1 vertical axis unit: Volt
– Channel 2 offset: 0
Table 4-3 Balanced output level accuracy specification
Balanced output level accuracy specification Equipment used
± 1 dB (typical), ± 1.5 dB Digital oscilloscope
AES Cable
DSO8064A
0scilloscope
U8903B
Balanced digital
output
55 Ω
termination
55 Ω
termination
+
–