Volume 4: Base IA-32 Instruction Reference
4:295
MOVZX—Move with Zero-Extend
Description
Copies the contents of the source operand (register or memory location) to the
destination operand (register) and sign extends the value to 16 or 32 bits. The size of
the converted value depends on the operand-size attribute.
Copies the contents of the source operand (register or memory location) to the
destination operand (register) and zero extends the value to 16 or 32 bits. The size of
the converted value depends on the operand-size attribute.
Operation
DEST
ZeroExtend(SRC);
Flags Affected
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Protected Mode Exceptions
#GP(0)
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
#SS(0)
If a memory operand effective address is outside the SS segment
limit.
#PF(fault-code)
If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Real Address Mode Exceptions
#GP
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
#SS
If a memory operand effective address is outside the SS segment
limit.
Opcode
Instruction
Description
0F B6 /
r
MOVZX
r16,r/m8
Move byte to word with zero-extension
0F B6 /
r
MOVZX
r32,r/m8
Move byte to doubleword, zero-extension
0F B7 /
r
MOVZX
r32,r/m16
Move word to doubleword, zero-extension
Содержание ITANIUM ARCHITECTURE
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Страница 7: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 199: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Страница 269: ...4 262 Volume 4 Base IA 32 Instruction Reference LES Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 270: ...Volume 4 Base IA 32 Instruction Reference 4 263 LFS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 273: ...4 266 Volume 4 Base IA 32 Instruction Reference LGS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 288: ...Volume 4 Base IA 32 Instruction Reference 4 281 LSS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 352: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Страница 368: ...Volume 4 Base IA 32 Instruction Reference 4 361 SHL SHR Shift Instructions See entry for SAL SAR SHL SHR ...
Страница 373: ...4 366 Volume 4 Base IA 32 Instruction Reference SIDT Store Interrupt Descriptor Table Register See entry for SGDT SIDT ...
Страница 589: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Страница 590: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Страница 591: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 603: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...
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