Volume 4: Base IA-32 Instruction Reference
4:135
FIST/FISTP—Store Integer
(Continued)
Operation
DEST
Integer(ST(0));
IF instruction = FISTP
THEN
PopRegisterStack;
FI;
FPU Flags Affected
C1
Set to 0 if stack underflow occurred.
Indicates rounding direction of if the inexact exception (#P) is
generated: 0 = not roundup; 1 = roundup.
Cleared to 0 otherwise.
C0, C2, C3
Undefined.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT register Consumption
Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Floating-point Exceptions
#IS
Stack underflow occurred.
#IA
Source operand is too large for the destination format
Source operand is a NaN value or unsupported format.
#P
Value cannot be represented exactly in destination format.
Protected Mode Exceptions
#GP(0)
If the destination is located in a nonwritable segment.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it
contains a null segment selector.
#SS(0)
If a memory operand effective address is outside the SS segment
limit.
#NM
EM or TS in CR0 is set.
#PF(fault-code)
If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Содержание ITANIUM ARCHITECTURE
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Страница 7: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 199: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Страница 269: ...4 262 Volume 4 Base IA 32 Instruction Reference LES Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 270: ...Volume 4 Base IA 32 Instruction Reference 4 263 LFS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 273: ...4 266 Volume 4 Base IA 32 Instruction Reference LGS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 288: ...Volume 4 Base IA 32 Instruction Reference 4 281 LSS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 352: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Страница 368: ...Volume 4 Base IA 32 Instruction Reference 4 361 SHL SHR Shift Instructions See entry for SAL SAR SHL SHR ...
Страница 373: ...4 366 Volume 4 Base IA 32 Instruction Reference SIDT Store Interrupt Descriptor Table Register See entry for SGDT SIDT ...
Страница 589: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Страница 590: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Страница 591: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 603: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...
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