Index-1
#, defined, 1-3, A-1
1-Mbyte mode, 5-1
fetching code, 5-23, 5-25
fetching data, 5-26
incrementing SP, 5-11
memory configuration example, 5-31
64-Kbyte mode, 5-1, 5-5
fetching code, 5-23, 5-25
fetching data, 5-26
incrementing SP, 5-11
memory configuration example, 5-27, 5-29
A
A15:0, B-6
A19:0, 5-1, 13-2, 13-20
for CCB0 fetch, 13-17
A19:16, 7-11, B-6
See also EPORT
Accumulator
ACC_0x register, 3-4
ACC_STAT register, 3-5
operating modes
fractional mode, 3-3
saturation mode, 3-2
setting mode bits (SME and FME), 3-6,
C-7
Accumulator, RALU, 2-4
AD15:0, 5-1, 13-2, 13-20, B-6
after reset, 13-18
ADD instruction, A-2, A-7, A-48, A-53, A-60
ADDB instruction, A-2, A-7, A-48, A-49, A-53,
A-60
ADDC instruction, A-2, A-7, A-50, A-53, A-60
ADDCB instruction, A-2, A-8, A-50, A-53, A-60
ADDRCOM2, C-49, C-52
ADDRCOM3, C-49, C-52
ADDRCOM4, C-49, C-52
ADDRCOM5, C-49, C-52
ADDRCOMx, 13-6, 13-9, 13-11
example, 13-13
initializing, 13-12
Address lines, extended‚ See A19:16‚ EPORT
Address space, 2-6, 5-1
16-Mbyte address space, 5-1
1-Mbyte address space, 5-1, 5-25
accessing pages 01H–0FH, 7-18
external, 5-1
internal, 5-2
partitions, 5-3–5-12
register RAM, 5-11
SFRs, See SFRs
special-purpose memory, See special-purpose
memory
Address/data bus, 2-5, 13-30
AC timing specifications, 13-36–13-45
bus width, See bus width
contention, 13-17
for CCB0 fetch, 13-17
for CCB1 fetch, 13-17
multiplexing, 13-1, 13-5, 13-12, 13-18–13-25
Addresses
internal and external, 1-3, 5-1, 13-1
notation, 1-3
Addressing modes, 4-6–4-7, A-6
ADDRMSK0, C-49, C-52
ADDRMSK1, C-49, C-52
ADDRMSK2, C-49, C-52
ADDRMSK3, C-49, C-52
ADDRMSK4, C-49, C-52
ADDRMSK5, C-49, C-52
ADDRMSKx, 13-6, 13-9, 13-11, 13-13
example, 13-13
initializing, 13-12
ALE, 13-3, 13-22, B-7
during bus hold, 13-30
Analog outputs, generating, 9-9
AND instruction, A-2, A-8, A-47, A-48, A-54,
A-61
ANDB instruction, A-2, A-8, A-9, A-48, A-49,
A-54, A-61
ApBUILDER software, downloading, 1-10
Application notes, ordering, 1-6
Arithmetic instructions, A-53, A-54, A-60, A-61
Assert, defined, 1-3
B
Baud rate
SIO port, 8-8–8-13
INDEX
Содержание 80C196NU
Страница 1: ...8XC196NP 80C196NU Microcontroller User s Manual...
Страница 2: ...8XC196NP 80C196NU Microcontroller User s Manual August 1995 Order Number 272479 002...
Страница 18: ...1 Guide to This Manual...
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Страница 31: ......
Страница 32: ...2 Architectural Overview...
Страница 33: ......
Страница 48: ...3 Advanced Math Features...
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Страница 56: ...4 Programming Considerations...
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Страница 72: ...5 Memory Partitions...
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Страница 106: ...6 Standard and PTS Interrupts...
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Страница 144: ...7 I O Ports...
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Страница 166: ...8 Serial I O SIO Port...
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Страница 184: ...9 Pulse width Modulator...
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Страница 196: ...10 Event Processor Array EPA...
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Страница 225: ......
Страница 226: ...11 Minimum Hardware Considerations...
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Страница 240: ...12 Special Operating Modes...
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Страница 256: ...13 Interfacing with External Memory...
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Страница 304: ...A Instruction Set Reference...
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Страница 374: ...B Signal Descriptions...
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Страница 390: ...C Registers...
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Страница 448: ...Glossary...
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Страница 458: ...Index...
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