6-13
STANDARD AND PTS INTERRUPTS
6.5.2
Modifying Interrupt Priorities
Your software can modify the default priorities of maskable interrupts by controlling the interrupt
mask registers (INT_MASK and INT_MASK1). For example, you can specify which interrupts,
if any, can interrupt an interrupt service routine. The following code shows one way to prevent
all interrupts, except EXTINT3 (priority 14), from interrupting an SIO receive interrupt service
routine (priority 06).
INT_MASK1
Address:
Reset State:
0013H
00H
The interrupt mask 1 (INT_MASK1) register enables or disables (masks) individual interrupt requests.
(The EI and DI instructions enable and disable servicing of all maskable interrupts.) INT_MASK1 can
be read from or written to as a byte register. PUSHA saves this register on the stack and POPA
restores it.
7
0
NMI
EXTINT3
EXTINT2
OVR2_3
OVR0_1
EPA3
EPA2
EPA1
Bit
Number
Function
7:0
Setting a bit enables the corresponding interrupt.
The standard interrupt vector locations are as follows:
Bit Mnemonic
Interrupt
Standard Vector
NMI
Nonmaskable Interrupt
FF203EH
EXTINT3
EXTINT3 pin
FF203CH
EXTINT2
EXTINT2 pin
FF203AH
OVR2_3
†
EPA Capture Channel 2 or 3 Overrun
FF2038H
OVR0_1
†
EPA Capture Channel 0 or 1 Overrun
FF2036H
EPA3
EPA Capture/Compare Channel 3
FF2034H
EPA2
EPA Capture/Compare Channel 2
FF2032H
EPA1
EPA Capture/Compare Channel 1
FF2030H
†
An overrun on the EPA capture/compare channels can generate the multiplexed
capture overrun interrupts. The EPA_MASK and EPA_PEND registers decode these
multiplexed interrupts. Write to EPA_MASK to enable the interrupt sources; read
EPA_PEND to determine which source caused the interrupt.
Figure 6-6. Interrupt Mask 1 (INT_MASK1) Register
Содержание 80C196NU
Страница 1: ...8XC196NP 80C196NU Microcontroller User s Manual...
Страница 2: ...8XC196NP 80C196NU Microcontroller User s Manual August 1995 Order Number 272479 002...
Страница 18: ...1 Guide to This Manual...
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Страница 32: ...2 Architectural Overview...
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Страница 48: ...3 Advanced Math Features...
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Страница 56: ...4 Programming Considerations...
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Страница 72: ...5 Memory Partitions...
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Страница 106: ...6 Standard and PTS Interrupts...
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Страница 144: ...7 I O Ports...
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Страница 166: ...8 Serial I O SIO Port...
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Страница 184: ...9 Pulse width Modulator...
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Страница 196: ...10 Event Processor Array EPA...
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Страница 226: ...11 Minimum Hardware Considerations...
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Страница 240: ...12 Special Operating Modes...
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Страница 256: ...13 Interfacing with External Memory...
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Страница 304: ...A Instruction Set Reference...
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Страница 374: ...B Signal Descriptions...
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Страница 390: ...C Registers...
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Страница 448: ...Glossary...
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Страница 458: ...Index...
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