Infineon XC800 Series, Руководство пользователя

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AP08056
Power Saving Features
Stopping the CPU Clock (Idle Mode)
Application Note 5 V1.0, 2006-12
2 Stopping the CPU Clock (Idle Mode)
The microcontroller can reduce power consumption by stopping the CPU’s clock. This
can be achieved by putting the device in idle mode. In this mode, the oscillator continues
to run, but the CPU is stopped with its clock disabled. Peripherals whose input clocks are
not disabled are still functional.
Note: If the watchdog timer (WDT) is still active when the device goes into idle mode, it
will generate an internal reset when an overflow occurs. It is therefore necessary
to disable the WDT before entering idle mode.
The CPU status is preserved in its entirety; the stack pointer, program counter, program
status word, accumulator, and all other registers maintain their data during idle mode.
The port pins hold the logical state they had at the time the idle mode was activated.
2.1 Entering and Exiting Idle Mode
Idle mode can be entered by setting the bit PCON.IDLE.
PCON |= 0x01;
Table 1 look at the savings in current consumption between active mode and idle mode
of the different devices.
Consider a program that is constantly waiting to service a Timer interrupt. The program
can:
a) wait in an endless loop for the interrupt event to occur, or
b) wait for the interrupt event to occur while the CPU is disabled (idle mode) and then
enable the CPU to service the interrupt routine when an interrupt occurs.
Method (b) will consume less power as indicated in Table 1 and Table 15 .
Table 1 Active and Idle mode current measurements
Current (mA)
Products CPU Clock Active
1)
1) Program waits in a continuos loop. i.e. while(1);.
Idle Difference
XC866-1FR 26.80 MHz 15.5 11.87 3.63
XC866-4FR 26.61 MHz 17.84 14.16 3.72
XC886 24.375 MHz 23.46 20.02 3.44
XC888 24.125 MHz 23.22 19.82 3.40