AP08056
Power Saving Features
Operating on a Lower Frequency Clock Mode
Application Note
20
V1.0, 2006-12
are some results showing the current consumption by a XC866-1FR device, a
XC866-4FR device and a XC886 device operating in PLL base mode.
6.1.1
Software Example for PLL Base Mode
In order to disconnect the oscillator, the VCO bypass mode must be selected first by
setting the bit PLL_CON.VCOBYP. This is to prevent the system from detecting a PLL
loss of lock condition which sets the NMICON.NMIPLL bit. The internal oscillator can be
powered down in PLL base mode to save power by setting bit OSC_CON.OSCPD.
The following example shows how the PLL base mode is selected.
SCU_PAGE = 0x01;//Open SCU page 1
PLL_CON |= 0x08;//Select VCO Bypass Mode. This step is to
//prevent PLL loss of lock bit from being set
PLL_CON |= 0x04;//Disconnect the oscillator
OSC_CON |= 0x10;//Power-down the oscillator
//... device is running in PLL Base Mode
The next example will show how to restore the clock in PLL mode from PLL base mode.
//... PLL_CON.VCOBYP = 1
SCU_PAGE = 0x01;//Open SCU page 1
OSC_CON &= 0xEF;//Power up the oscillator
OSC_CON |= 0x02;//Reset and restart oscillator detection logic
while(!(OSC_CON & 0x01));//Wait for oscillator to run
PLL_CON &= 0xFB;//Connect oscillator to PLL
PLL_CON |= 0x02;//Restart PLL lock detection
while(!(PLL_CON & 0x01));//Wait for PLL lock bit to set
Table 12
Current consumption in PLL base mode
XC866-1FR
XC866-4FR
XC886
VCOSEL
0
1
0
1
0
1
f
VCObase
(MHz)
22.48
38.94
22.00
37.70
36.22
21.24
f
SYS
(MHz) with K = 2
11.24
19.47
11.00
18.85
18.11
10.62
PLL base mode
current
2.74 mA
4.25 mA 3.07 mA 4.75 mA 5.12 mA 3.37 mA
PLL base mode
1)
current with slow-
down mode enabled
1) CLKREL = 1011
B
for XC886 and CLKREL = 1111
B
for XC886
1.01 mA
1.35 mA 1.26 mA 1.65 mA 1.60 mA 1.23 mA
