![Infineon OPTIREG TLF30681QVS01 Скачать руководство пользователя страница 79](http://html1.mh-extra.com/html/infineon/optireg-tlf30681qvs01/optireg-tlf30681qvs01_manual_2055183079.webp)
8.2
Operation states
ACTIVE
The ACTIVE state is the first state that the device enters after power-on. The device powers up all voltage rails
and expects to receive configuration from the microcontroller within the initialization time window according to
the INIT timer.
On deactivation of the microcontroller reset the INIT timer starts. If the following conditions are fulfilled, then
the INIT timer stops:
•
The device receives valid SPI communication from the microcontroller.
•
The window watchdog is serviced once according to its configuration.
If the INIT timer is not stopped and expires, then the device detects an initialization error. The first initialization
error triggers a soft reset, which activates the reset signal ROT, but no state transition. The second initialization
error triggers a hard reset, which activates the reset signal ROT and shuts down the supply rails, thus the device
enters FAULT state and the system restarts.
The microcontroller can request a transition from ACTIVE state to either DISABLED state or LOCKED state via an
SPI command. On an SPI request to change the state to DISABLED or LOCKED the device enters the FAULT state
for 20 ms before it enters the requested state. This is done to ensure a proper discharge of the output voltages
of all switching regulators before the device is be enabled again.
DISABLED
During DISABLED state the device is powered off and it only monitors the enable signal (ENA) for a valid enable
condition. Once a valid enable event is detected, the device enters ACTIVE state and expects configuration from
the microcontroller. In DISABLED state the device resets the content of all registers. The device needs to be
configured again during the ACTIVE state.
FAULT
On detection of a severe fault the device enters FAULT state. In FAULT state all regulators are switched off and
the microcontroller reset (ROT) is asserted. The device remains in FAULT state for the specified fault time prior
to a transition into ACTIVE state. In FAULT state the device retains event registers to store the reason for entering
the FAULT state. The device resets all other registers.
A soft reset condition on the first detection of a fault condition triggers the reset signal ROT, but no state
transition. If the device detects the same soft reset fault condition again, then it increases the severity of the
fault to a severe fault. In this case the device enters the FAULT state. This applies for all soft reset faults except
the window watchdog error counter overflow.
LOCKED
The device enters LOCKED state after three severe faults, brought on by expiration of the initialization counter
or by request of the microcontroller. The power consumption in LOCKED state is reduced. The device remains in
LOCKED state until it detects the next valid enable event. In LOCKED state the device only retains a limited set of
the event registers to store the reason for entering the LOCKED state. The device resets all other registers.
Table 23
Operational states functional overview.
ACTIVE
FAULT
LOCKED
DISABLED
Block or function
Buck1
on
R
off
R
off
R
off
R
Buck2
on
RW
off
R
off
R
off
R
Boost1
on
RW
off
R
off
R
off
R
VM1
on
RW
off
R
off
R
off
R
OPTIREG
™
PMIC TLF30681QVS01
Power management IC
State machine
Datasheet
79
Rev. 1.0
2020-04-08