Infineon CY7110, Руководство пользователя

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User Guide 59 of 67 002-32601 Rev. *C
2021-12-02
EZ- PD™ PMG1 MCU prototyping kits guide
CY7110/CY7111/CY7112/CY7113
Application development on CY711x kits using ModusToolbox™ soft ware
Figure 55
J-Link commander: Settings change for CY7110 programming/debug
Do the following to program or debug the CY7110 kit using the J-Link probe from ModusToolbox ™ software .
1. Open the Eclipse IDE for ModusToolbox™ software and select the PMG1 project on the host PC. For details,
see the Eclipse IDE for ModusToolbox™ software user guide [8] .
2. Place the jumper shunt on pins 2 – 3 of the power section jumper (J5).
3. Connect the USB PD sink port to the USB PD source to activate onboard LDO, Load switch, and user LED.
Ensure that LED4 (power LED) glows green.
4. Connect J-Link debugger to prototyping kit through 10-pin SWD connector, and use a 9-pin Cortex®-M
adapter.
5. In case you want to program the MCU, click <Application name> Program (J-Link) from the Launches
section.
6. In case you want to debug the application, click <Application name> Debug (J-Link) from the Launches
section. The IDE will switch to debugging mode and will halt at the first line of the main () function. This
indicates that the application is ready for debugging.
Note: CY7110 kit supports only 5 V USB PD contract in debug mode using J-Link.
5.5.2 Programming and debugging the CY7111/CY7112/CY7113 kits
The J- Link debugger measures the target MCU’s voltage through VTARG pin to detect and establish the
connection. The reverse voltage protection diode (D5) between the VTART pin (of J8) and VIN (J5.3) prevents
the measurement of the target MCU voltage on the VTARG pin. Do the following changes in hardware before
using J-Link.
1. Solder on a standard Mini SWD 0.05-inch-pitch connector. FTSH-105-01-L-DV-K-P-TR from Samtech is the
recommended connector.
2. Remove the 0-ohm series resistor between VTARG (J8.1) and VIN (J5.3):
− R12 for CY7111 and CY7113
− R30 for CY7112
3. Populate the 0-ohm series resistor between VTARG (J8.1) and VDDD (MCU):
− R11 for CY7111 and CY7113
− R29 for CY7112