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O P E R A T I N G I N R E M O T E C O N T R O L
Status Reporting
24
LDC-3908
C H A P T E R
3
!
Figure 3.1 on page
24
shows the status reporting scheme of the LDC−3908 Laser Diode Controller.
Operation Complete Definition
Bit 0 of the Standard Event Status register contains the status of the Operation Complete flag.
Enabling this bit via the *ESE command allows you to update Bit 5 of the status byte. Then, if the
SRE mask has bit 5 set, and the user issues an *OPC command, the SRQ signal is generated upon
completion of the currently processed commands. This is used to initiate service request routines
that depend on the completion of all previous commands.
.
Figure 3.1
LDC-3908 Status Reporting Schematic Diagram
Note:
The LDC-3908 does not define operation completeness in the same way as earlier
model ILX instruments.
Care must be taken when using the *OPC, *OPC?, and *WAI commands with the
LAS:OUT ON command, due to the two-second turn-on delay. In some cases operation
completion may far exceed the standard GPIB time-out setting.
If the GPIB times out while waiting for a response, either set the GPIB time-out to be longer
or use SRQ-generated interrupts in your program. See your GPIB manual for time-out
configuration or SRQ programming setup.
LOGICAL
OR
ALLCOND?
Condition Status Summary Register
&
&
&
&
&
&
&
&
LOGICAL
OR
Standard
Event Status Enable
Register
*ESE
*ESE?
Service Request Enable
Register
*SRE
*SRE?
LOGICAL
OR
&
&
&
&
&
&
&
0 - Operation Complete
1 - Request Control
2 - Query Error
3 - Device-Dependendent Error
4 - Execution Error
5 - Command Error
6 - User Request
7 - Power On
0 - Module Event Summary
1 - Module Condition Summary
2 -
3 -
4 - Message Available
5 - Event Status Summary
6 - Request Service/Master Status Summary
7 - Error Available
Status Byte Register
*STB?
SERVICE
REQUEST
GENERATION
{
OUTPUT
QUEUE
NOT-EMPTY
QUEUE
QUEUE
NOT-EMPTY
QUEUE
ERROR
{
0 - Channel 1
1 - Channel 2
2 - Channel 3
3 - Channel 4
4 - Channel 5
5 - Channel 6
6 - Channel 7
7 - Channel 8
{
{
Standard
Event Status Register
*ESR?
LOGICAL
OR
ALLEVE?
Event Status Summary Register
0
1
2
3
4
5
6
7
0
1
2
3
4
5
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0 - Channel 1
1 - Channel 2
2 - Channel 3
3 - Channel 4
4 - Channel 5
5 - Channel 6
6 - Channel 7
7 - Channel 8
0
1
2
3
4
5
6
7
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Содержание LDC-3908
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