5. Performance > Performance Measurements
CPS-1848 User Manual
96
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
5.3
Performance Measurements
Performance measurements for complex traffic patterns can be specified for two different configurations of performance
settings. The first configuration is for lightly loaded systems, where the likelihood of resource contention is low. This is known
as the “fair share” performance configuration.
The second configuration is for congested systems that optimize the throughput and latency of the highest priority packets at
the expense of lower priority packets. This is known as the “high priority” performance configuration.
The switch architecture of the CPS-1848 is optimized for performance under various traffic patterns, and requires minimal
changes from the default settings to achieve this requirement. The optimization of the switch supports various traffic conditions
where congestion is encountered for specific priority packets used.
With a Combined Input Crosspoint Queue (CICQ) architecture, the input buffer and final buffer do not have to make any
agreements. The input buffer distributes packets to crosspoint buffers based on which output port the packet is destined for.
The crosspoint buffers help to pull packets from the input buffers to free them so that contention is minimized and to allow more
data to flow from the source. Packets are pulled into a port’s final buffer from its crosspoint buffers as they become available.
Packets are then fed to the port’s transmission path from the final buffer.
There are, however, a few parameters that require adjustments for specific usage case as listed below:
• Input Buffer, Crosspoint Buffer, and Final Buffer Allocation
— Buffer Allocation Size
— Switching Arbitration mode
• Store-and-Forward mode versus Cut-Through mode
• Transmitter-Controlled Flow Control mode versus Receiver-Controlled Flow Control mode
The following sections describe the various modes.
5.3.1
Buffer Management Settings
There are three stages of buffering in the CPS-1848: Input buffer, Crosspoint buffer, and Final Buffer. The Input Buffer can
accept up to 12 packets.
Each Crosspoint Buffer can accept up to 9 packets. The final buffer can accept up to 34 packets.
5.3.1.1
Buffer Allocation Size
There are two fields in the
that configure the CPS-1848’s buffers. BUF_ALLOC configures both
the input buffer and the crosspoint buffer, while FB_ALLOC configures the final buffer if BUF_ALLOC is 0.
The configuration of these fields defines the minimum number of buffer pages that are allocated in a given buffer for each
priority. For more information about buffer availability and configuration, see
Input and crosspoint buffers have two buffer reservation modes. Single buffer reservation mode is used to minimize the
occurrences of congestion, while multi-buffer (double) reservation mode is used to provide high throughput for all priorities
when congestion occurs.
Configurations that are different from fair share and high priority will have performance figures between
the two values.
In certain traffic conditions, multi-buffer reservation ensures that line rate performance can be
maintained for higher priority packets in the event that congestion exists for low priority packets.
However, this lowers the maximum number of low priority packets that can be stored in the Input Buffer
at a given time.
