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©2018 Integrated Device Technology, Inc
September 12, 2018
8A3xxxx Family Programming Guide
STATUS.DPLL7_FILTER_STATUS
DPLL 7 loop filter status.
STATUS.DPLL_SYS_FILTER_STATUS
Loop filter status of system DPLL .
Table 74: STATUS.DPLL7_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL7_FILTER_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
07Ch
FILTER_STATUS[7:0]
07Dh
FILTER_STATUS[15:8]
07Eh
FILTER_STATUS[23:16]
07Fh
FILTER_STATUS[31:24]
080h
FILTER_STATUS[39:32]
081h
FILTER_STATUS[47:40]
STATUS.DPLL7_FILTER_STATUS Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
FILTER_STATUS[47:0]
R/O
0
DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.
Table 75: STATUS.DPLL_SYS_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL_SYS_FILTER_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
084h
FILTER_STATUS[7:0]
085h
FILTER_STATUS[15:8]
086h
FILTER_STATUS[23:16]
087h
FILTER_STATUS[31:24]
088h
FILTER_STATUS[39:32]
089h
FILTER_STATUS[47:40]
STATUS.DPLL_SYS_FILTER_STATUS Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
FILTER_STATUS[47:0]
R/O
0
System DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.