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©2018 Integrated Device Technology, Inc
September 12, 2018
8A3xxxx Family Programming Guide
STATUS.DPLL3_FILTER_STATUS
DPLL 3 loop filter status.
STATUS.DPLL4_FILTER_STATUS
DPLL 4 loop filter status.
Table 70: STATUS.DPLL3_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL3_FILTER_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
05Ch
FILTER_STATUS[7:0]
05Dh
FILTER_STATUS[15:8]
05Eh
FILTER_STATUS[23:16]
05Fh
FILTER_STATUS[31:24]
060h
FILTER_STATUS[39:32]
061h
FILTER_STATUS[47:40]
STATUS.DPLL3_FILTER_STATUS Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
FILTER_STATUS[47:0]
R/O
0
DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.
Table 71: STATUS.DPLL4_FILTER_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL4_FILTER_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
064h
FILTER_STATUS[7:0]
065h
FILTER_STATUS[15:8]
066h
FILTER_STATUS[23:16]
067h
FILTER_STATUS[31:24]
068h
FILTER_STATUS[39:32]
069h
FILTER_STATUS[47:40]
STATUS.DPLL4_FILTER_STATUS Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
FILTER_STATUS[47:0]
R/O
0
DPLL loop filter status.
Fine phase measurement in units of 50/128 picoseconds.