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©2018 Integrated Device Technology, Inc
September 12, 2018
8A3xxxx Family Programming Guide
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STICKY_STATUS_CLEAR.IN0_TO_7_MON_STICKY_STATUS_CLEAR
Clear sticky reference monitor bits for a particular input.
Table 122: STICKY_STATUS_CLEAR Register Index
Offset
(Hex)
Register Module Base Address: C164h
Individual Register Name
Register Description
000h
STICKY_STATUS_CLEAR.IN0_TO_7_MON_S
TICKY_STATUS_CLEAR
Clear sticky reference monitor status.
001h
STICKY_STATUS_CLEAR.IN8_TO_15_MON_S
TICKY_STATUS_CLEAR
Clear sticky reference monitor status.
002h
STICKY_STATUS_CLEAR.DPLL_STICKY_STA
TUS_CLEAR
Clear sticky DPLL status.
003h
STICKY_STATUS_CLEAR.DPLL_SYS_STICKY
_STATUS_CLEAR
Clear sticky system DPLL status.
004h
STICKY_STATUS_CLEAR.SYS_APLL_STICKY
_STATUS_CLEAR
Clear sticky system APLL status.
005h
STICKY_STATUS_CLEAR.ALL_STICKY_STAT
US_CLEAR
Clear all sticky status bits.
Table 123: STICKY_STATUS_CLEAR.IN0_TO_7_MON_STICKY_STATUS_CLEAR Bit Field Locations and
Descriptions
Offset
Address
(Hex)
STICKY_STATUS_CLEAR.IN0_TO_7_MON_STICKY_STATUS_CLEAR Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
000h
IN7_MON_S
TICKY_CLE
AR[7]
IN6_MON_S
TICKY_CLE
AR[6]
IN5_MON_S
TICKY_CLE
AR[5]
IN4_MON_S
TICKY_CLE
AR[4]
IN3_MON_S
TICKY_CLE
AR[3]
IN2_MON_S
TICKY_CLE
AR[2]
IN1_MON_S
TICKY_CLE
AR[1]
IN0_MON_S
TICKY_CLE
AR[0]
STICKY_STATUS_CLEAR.IN0_TO_7_MON_STICKY_STATUS_CLEAR Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
IN7_MON_STICKY_CLEA
R[7]
RW1C
0
Write 1 to clear the sticky bits of input 7.
IN6_MON_STICKY_CLEA
R[6]
RW1C
0
Write 1 to clear the sticky bits of input 6.
IN5_MON_STICKY_CLEA
R[5]
RW1C
0
Write 1 to clear the sticky bits of input 5.
IN4_MON_STICKY_CLEA
R[4]
RW1C
0
Write 1 to clear the sticky bits of input 4.
IN3_MON_STICKY_CLEA
R[3]
RW1C
0
Write 1 to clear the sticky bits of input 3.