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©2018 Integrated Device Technology, Inc
September 12, 2018
8A3xxxx Family Programming Guide
STATUS.DPLL3_STATUS
DPLL 3 status.
STATUS.DPLL4_STATUS
DPLL 4 status.
Table 51: STATUS.DPLL3_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL3_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
01Bh
RESERVED[7:6]
DPLL3_HOL
DOVER_STA
TE_CHANG
E_STICKY[5]
DPLL3_LOC
K_STATE_C
HANGE_STI
CKY[4]
DPLL3_STATE[3:0]
STATUS.DPLL3_STATUS Bit Field Descriptions
Bit Field Name
Field Type Default Value
Description
RESERVED
N/A
-
This field must not be modified from the read value
DPLL3_HOLDOVER_STAT
E_CHANGE_STICKY[5]
R/O
0
Holdover state change sticky bit.
Indicates whether any transition to or from Holdover state occurred.
0 = no transition to or from Holdover state
1 = transition to or from Holdover state
DPLL3_LOCK_STATE_CH
ANGE_STICKY[4]
R/O
0
Lock state change sticky bit.
Indicates whether any transition to or from Locked state occurred.
0 = no transition to or from Locked state
1 = transition to or from Locked state
DPLL3_STATE[3:0]
R/O
0
Current state of DPLL3.
0 = freerun
1 = lockacq
2 = lockrec
3 = locked
4 = holdover
5 = open loop
Table 52: STATUS.DPLL4_STATUS Bit Field Locations and Descriptions
Offset
Address
(Hex)
STATUS.DPLL4_STATUS Bit Field Locations
D7
D6
D5
D4
D3
D2
D1
D0
01Ch
RESERVED[7:6]
DPLL4_HOL
DOVER_STA
TE_CHANG
E_STICKY[5]
DPLL4_LOC
K_STATE_C
HANGE_STI
CKY[4]
DPLL4_STATE[3:0]