ICS ICS-130, Руководство по эксплуатации

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DOC E10523 Rev.D

Interactive Circuits And Systems Ltd. 2000
6
3.2 Input Bandwidth and Sample Rate
The AD7723 Sigma-Delta ADC chip employs a number of digital filters in series in
order to achieve a high decimation factor. The composite response of these filters
governs the input signal bandwidth. The digital filter response can be either lowpass or
bandpass as shown in Figure 3.
For the lowpass filter case, as shown in
Figure 3(a), the output rate, Fo, can be
either Fs/16 or Fs/32. Note that for the
lowpass case (which is the case for most
applications) and for a flat pass band, the
sample rate can be selected as:
Fs = 32 x BW/0.383 for BW < 230 kHz
or Fs = 16 x BW/0.383 for BW < 460 kHz
For the bandpass case, as shown in
Figure 3(b), the output rate must be Fs/32.
The band shown in the figure (0.308Fo to
0.383Fo) is shifted down to DC.
The choice of filter type and decimation
(oversampling) ratio may be selected using
the ADC Mode field of the ICS-130 Control
register (see section 5.7.11). Further details
on the converter characteristics are available from the manufacturer, Analog Devices, at the
following web site address:
http://products.analog.com/products/info.asp?product=AD7723
The outputs of the ADCs are combined to produce up to sixteen 32-bit words, depending
on the number of channels selected to be active, in the Channel Count register (see section
5.8). The selected data are transmitted either to the FPDP/P2 FIFO and/or to the VME
swing buffer. The output data format is:
D31 D0
Channel 1 Channel 2 Word 1
Channel 3 Channel 4 Word 2
• • • • • • •
Channel N-1 Channel N •
Channel 1 Channel 2 •
• • • • • • •
FLAT RESPONSE (0.383 x Fo)
-3dB POINT (0.478 x Fo)
Fo/2
Fo = Output Rate
= Fs/16 or Fs/32
0.308 x Fo
Fo/2 Fo = Fs/16
0.383 x Fo
(a)
(b)
K10387-1
Fo/4
Figure 3 - Lowpass and Bandpass
response options