ICS ICS-130, Руководство по эксплуатации

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DOC E10523 Rev.D
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Interactive Circuits And Systems Ltd. 2000
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5.2 SCV64 Registers
The ICS-130 uses the Tundra Semiconductor SCV64 VMEbus interface chip to handle all
VMEbus communications. Full details of the SCV64 may be found in the SCV64 User
Manual (See Ref. 1). Table 5.2 gives descriptions for the SCV64 registers which may be
needed when programming the ICS-130. Unless the Master BLT/MBLT or the A64
capability of the SCV64 is to be utilized, the power-up defaults of the register contents are
sufficient, with the following exception: the MODE register should be programmed to the
hexadecimal value 0x9480e401. This value is chosen to optimize speed of transfer
between the ICS-130 and the VMEbus. Descriptions of some of the bits of the MODE
register are given in Table 5.2. For a more detailed description, see Ref. 1.
If the user wishes to employ VMEbus 64-bit address cycles (A64 addressing mode) when
addressing the ICS-130, it is necessary to program the most significant 32 bits of the
ICS-130 base address (i.e. bits A<63:32>) to SCV64 register SA64BAR. The procedure for
doing this is as follows:
i) Set MODE<12> to '1' (coupled mode).
ii) Write most significant 32 bits of VMEbus address to SA64BAR.
iii) Clear MODE<12>.
The least significant 32 bits of the 64-bit base address are taken from the A32 base
address values configured for the board as described in section 4. These jumper settings
are loaded to the SCV64 VMEBAR register at power up, but can be subsequently
reprogrammed by the user.
The register map of the SCV64 is complex, as it contains functionality not useful to the
operation of the ICS-130. Only the relevant register assignments are discussed here. For
this reason, accesses to the SCV64 memory space other than to documented offsets may
have unpredictable consequences and should be avoided. The SCV64 has two sets of
address and data busses, one connected to the VMEbus and the other to the ICS-130 local
bus. VMEbus accesses are mapped from VMEbus space to local bus according to the
programming of the SCV64. When the SCV64 is used to perform VMEbus Master transfers,
it simultaneously becomes the local bus Master, and the VMEbus Master. When VMEbus
Slave cycles occur, the SCV64 is the VMEbus Slave, but the local bus Master. When
performing VMEbus Master transfers, the SCV64 can be configured to use normal cycles
(VMEbus address broadcast between each cycle), BLT (D32 block transfer), or MBLT (D64
multiplexed block transfer). All register offsets are given with respect to the beginning of the
SCV64 register window (BASE + 0x40000).
When the SCV64 is programmed to operate as the VMEbus Master, some caution must be
taken when considering transfer counts. This is discussed in section 5.3.