3-8
3
Questionable Event register to monitor digital inputs CH1 and CH2 by
capturing a positive transition on bit 0 and a negative transition on bit 1:
STAT:QUES:PTR 1
'
enables bit 1 to set on a positive transition
of CH1
STAT:QUES:NTR 2
'enables bit 2 to set on a negative transition
of CH2
The Questionable Enable Register enables set Event bits to be included in
the summary output to the Status Byte Register. The following example
enables bits 1 and 2:
STAT:QUES:ENAB 3
'enables Event bits 1 and 2
The Questionable Event Register has to be cleared after an SERVICE
REQUEST is generated to reset the bits. Use either the *CLS command or
read the register with a query. e.g.
STAT:QUES?
'reads the Questionable Event register
3.4.3.2 Reading the Digital Inputs
The Questionable Condition Register reflects the real time condition of the
unit's first 15 digital inputs. A logical 1 means that the corresponding digital
input is high or an open contact. A logical 0 is a low input or a contact
closure to ground. To read the Questionable Condition Register use the
following SCPI query:
STAT:QUES:COND?
'reads the status inputs
Reading the Questionable Condition Register does not change its contents.
The response is a decimal number that is the sum of the binary values of the
inputs with levels equal to a logical 1. e.g.
129 = bits 8 and 1 set to logic 1, others = 0
3.4.4
Operation Registers
The 488.2 Operation Registers lets the user read device Local/Remote
status and detect any changes in the device's status. The Operation
Registers are similar to the Questionable Registers described in paragraph
3.4.3.
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