Honeywell
COMPONENT MAINTENANCE MANUAL
PART NUMBER 964-0452
1I.B.1516A Page 26
Mar 30/01
23-12-01
1
From the Front End to the 2nd Intermediate Frequency
The input signal arrives at antenna jack X201 via a 9th-degree Cauer low-pass
filter, which ensures the necessary signal-to-image ratio. The subsequent
push-pull mixer, composed of transformer, T2, and 4-way switch, S40, is used
for conversion to a 40.025MHz IF signal. The following crystal filter, Z40, sup-
presses image signals (2nd image + aliasing 75kHz), as well as distant interfer-
ers, which could generate intermodulation products.
Together with low-pass filter, L24, C51, L23, and C52, coupling element, R53,
L19, and C33, forms a 50
Ω
source impedance for the crystal filter. The oscillator
level at the 1st mixer is raised in amplifier stage V7, V8, and V10 to about.
30dBm. This results in high linearity of the mixer stage, thus obviating the need
for regulation. Transistors V10 and V8 operate as base stages according to lin-
ear class A.
V7 and transformer, T1, form the output stage of the amplifier that is used as an
emitter follower. Parasitic capacities limit the rise rate of the signal, so that the
level at the push-pull mixer (mixer 1/mixer 2) declines slightly with high frequen-
cies (>65MHz). The oscillator level can be taken at measuring point X501. The
oscillator frequency ranges from 42.0250 to 70.0249MHz, depending upon the
receive frequency. The frequency of the oscillator results in the input signal be-
ing transposed; i.e, USB becomes LSB and vice versa.
The pin diodes, V44 and V42, are through-connected by means of RX +15V and
TX +15V. In addition, the 1st IF signal is supplied to a 30dB AGC amplifier. The
input stage is formed by transformer, T40, transistor, V3, and resistor, R29;
matching is achieved by an appropriate turn ratio.
The adjustable section of the amplifier is composed of 2 transistors, V5 and V6,
operated in the base stages. The amplification is modified by applying the AGC
RF voltage, which in turn is obtained in diode detector, V50, V52, and N2-D. To
do this, the 2nd IF signal (N7-D) is amplified, rectified (V50/V52), and compared
with the fixed voltage of +2.7V at V51. The higher of the 2 voltages is effective.
The subsequent "double-balanced" diode mixer, U40, converts the 1st IF signal
into the 2nd IF signal of 25kHz with the aid of the 40MHz oscillator. No change
occurs in the position of the sidebands as a result, so that the reverse frequency
position occurs as compared to the antenna signal (see above).
Now the 2nd IF signal is amplified (V4, N4, V47), filtered (N6), and supplied to
the ADC amplifier (N3-A) via a switch. Antialiasing filter, N6, suppresses the 3rd
harmonic, which may have occurred in U40, and in the 2nd IF amplifier. ADC
amplifier N3-A brings the signal to a level matched to the A/D converter of
±
4V.
Note that no trimming value is required for level adjustment from the antenna
input up to this point.
The input stage of Receiver/Exciter, A1, is protected against overvoltage by
means of Voltage Protection Circuit, V11, V12, and C47. A voltage of about 7.5V
is created at diodes V11 and V12 prepolarized in the reverse direction. As soon
as a signal at the output of low-pass filter, L1, L2, L3, and L4, exceeds this volt-
age, the diodes become conductive, and thus protect the input of the subse-
quent mixer.
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