Honeywell
COMPONENT MAINTENANCE MANUAL
PART NUMBER 964-0452
I.B.1516A Page 45
Mar 30/01
23-12-01
filter capacitor, C21. As a result, the output voltage can still be maintained at
+6V at C20 with full output current. R66 provides the output of N1 with a base
load, and thus prevents oscillation of the voltage regulator, as does correction
capacitor, C39. Current limitation with foldback characteristic is realized by
means of shunt, R18, and the 2 resistors, R64 and R65.
An auxiliary voltage (AU21) of +13V is generated from the direct voltage at C23
by means of transistor, V14, via V20. From this, a further auxiliary voltage, AV5,
is derived by means of fixed voltage regulator, N3. These 2 auxiliary voltages
are used to supply the monitoring facilities and circuit components to the data
bus connection. In the event of voltage failure at C23, diode, V21, takes over,
and continues to supply the auxiliary voltages from the voltage at C31.
3
Continuous monitoring, CM
Power Supply, A4, contains numerous circuits for monitoring input voltages, out-
put voltages, output current, and temperature. Some of these are signalled by
data bus to Controller, A8, but others also directly trigger responses in Power
Supply, A4, and Power Amplifier, A3, in the event of a fault to prevent damage.
To monitor the small-signal supply voltages, the +15V voltage is initially divided
by R56 and R55. In the event of undervoltage, the potential at the noninverting
input of comparator, N5-C, is set to a lower value than that present at the invert-
ing input of N5-C via R72. Comparator, N5-C, then switches to L level. Resistor,
R46, ensures a switching hysteresis.
Comparator, N5-B, monitors the –15V voltage. This is applied via R47 to the in-
verting input of N5-8, which is set to a positive voltage by R85. In the event of
undervoltage at –15V, this voltage exceeds the value applied via R105 and R84
at N5.9; N5-B switches to L level. Resistor, R54, ensures a suitching hysteresis.
As soon as either N5-C or N5-B switches to L level, the CMSSPS signal is set
to H level by gates, D6-A, D6-B, and D6-C if the signal PWINT = H. That means
that there is sufficiently high mains input voltage at this time. The CMSSPS sig-
nal generates an L pulse via D2-A at CMINT, and is thus able to cause Control-
ler, A8, to inquire the CM reports by data bus, and permits fault localization.
Power Supply, A4, supplies a RESET signal to Controller Voice, A8. For this pur-
pose, comparator, N5-A, is monitoring the +5V supply voltage, and switches its
output to L level when this voltage is
≥
+4.8V.
Until this moment, capacitor, C54, is charged at >4V via R51 and V50, and is
now beginning to discharge slowly via R71. With a delay of 60ms, RESET is set
to H level via gate, D4-A, and the processor will start.
On mains interruptions, PWINT is set to L level. V28 blocks, and C54 is charged
at >+4 V via R57 and V51 with a time constant of 13ms. RESET, caused by
mains interruptions >10ms, is set to L level, and the processor is switched OFF.
Comparator, N6-D, monitors the supply voltage of the driver stage in amplifier,
A3, +28V. Voltage divider, R98 and R74, prevents the maximum input voltage of
N6-D from being exceeded. In the event of nominal voLtage at +28V, C86 is
quickly charged via diode, V73, to about +7V, N6-D switches to L level, and thus
indicates, via signal CM28V, that the supply voltage is in order. If the +28V fails,
C86 is discharged via R75 with a time constant of 40ms, whereby CM28V is-
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