Honeywell
COMPONENT MAINTENANCE MANUAL
PART NUMBER 964-0452
I.B.1516A Page 47
Mar 30/01
23-12-01
The SENSE signal is formed in order to detect power system failures of 1 or
more phases with diodes, V24, V25, and V32. In normal circumstances, the volt-
age never falls below 10V at this point. A direct voltage of +6.8V, limited by Ze-
ner diode, V54, is present at the gate of V57, whereby the source connection
lies at about +4V. Diode, V55, is disabled and V3 is through-connected. V2 is
also through-connected by the voltage drop at R89, and sets the PWINT signal
to H level. In the event of 1 phase failing or having a voltage below 80V
rms
, volt-
age dips are already present at the base connection of V57, whereby V57 is
briefly disabled every 2.5ms and capacitor, C50, is quickly discharged via diode,
V55, and resistor, R77. As a result, V3 is disabled and,in turn, causes V2 to be
disabled as well. The PWINT signal is then drawn to L level by pull-down resis-
tor, R25, and consequently, the operating points of the HF transistors are dis-
connected in Power Amplifier, A3. Furthermore, an L pulse is generated on
CMINT at every PWINT edge. PWINT is available via D4-D and D1-A for scan-
ning by data bus.
In the event of recovery of all 3 phases of the input voltage, V57 is again perma-
nently through-connected and V55 is disabled. Capacitor, C50, is now charged
with a time constant of 33ms via R42, and if the voltage at the gate of V3 is large
enough, V3 and V2 are through-connected and set PWINT to H level. R41 ini-
tiates positive feedback, and thus ensures a switching hysteresis as well as
steep edges at PWINT.
The equipment operation envisages that power failures must be classified ac-
cording to their duration. In this context, the 2 monoflops D5-A and D5-B are trig-
gered with the falling edge at PWINT; their outputs, D5.6 and D5.10 are inquired
via data bus (data bits D7 and D6) as quickly as possible once the supply volt-
age has recovered.
In the event of a power system failure <200ms, both outputs are H; in the case
of failures >200ms and <5,000ms, D5.6 = H and D5.10 = L. With Longer failures,
both outputs are L.
During normal operation, D5 is supplied via diode, V70, from auxiliary voltage,
AV5. During the power system failure, the energy is taken from C80.
4
Data Bus Controller ——> Power Supply
The information from the module data bus (only D0 to D7 in use) is stored with
MS4 = L and MWR = L in latch, D3A.
When at H level (CPLOFF signal = H), data bit D1 causes output voltage CPLPS
to be turned OFF via V71.
If data bit D4 is set to H level, the BLOWON signal is H, and a relay in the Power
Amplifier, A3 switches ON the internal blower.
5
Data Bus Power Supply ——> Controller
SignaIs CMCCPL, CMTEMP, CMSSPS, CMVCPL, PWfNT, and CM28V are ap-
plied, both directly and time-deLayed via RC sections, at the inputs of 8-bit com-
parator, D2A. Each time the 6 signals change, therefore, the P and Q values of
the comparator differ for a short time. Level H is present at output, D2.19, for
about 15 to 20
µ
s. Transistor, V1, connects through and sets line CMINT (nor-
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