Honeywell
COMPONENT MAINTENANCE MANUAL
PART NUMBER 964-0452
I.B.1516A Page 41
Mar 30/01
23-12-01
6
Monitoring, CM, BIT
Power Amplifier, A3, is able to detect and locate accurately mismatching and
overtemperature as well as module defects with the aid of monitoring circuits on
Amplifier Control, A33.
The TSFS signal comes from Amplifier Board, A31, and is a measure of the
heat sink temperature at the final stage transistors. It is applied via diode, V48,
to the inverting input of comparator, U1-C, where it is compared with a voltage
derived from VREF. If the heat sink temperature e125
°
C so that TSFS
consequently e3.8V, U1-C switches the output to 0V, and inverter D8-B
transfers the CMTEM signal to H level, thus producing the "Overtemperature
Power Amplifier A3" message.
R208 initiates a hysteresis of approximately 0.2V at TSFS, corresponding to a
temperature difference of 10K.
To detect mismatching at the transceiver output, the REVERSE signal is com-
pared with the FORWARD signal divided by R191 and RI77 at comparator,
U2-A. If the REVERSE voltage exceeds 25
%
of the FORWARD voltage, which
would correspond to a VSWR = 1.7, comparator, U2-A, switches its output to
high resistance, and capacitor, C92, is charged with a time constant of 220
µ
s to
+5.3V via resistor, R205, and diode, V12.
In the reverse direction, diode V12 is disabled, and a discharge time constant of
22ms is derived from C92 and R206, whereby the VSWR message is main-
tained for approximately 5ms. In conjunction with the operating point of the
Schmitt trigger input of inverter D6-B, a response time of about 50
µ
s results.
The second inverter finally generates the VSWR signal, which can be inquired
by Controller, A8, via the data bus.
To prevent the comparator from reporting VSWR = H without HF power (FOR-
WARD = REVERSE = 0) as a result of offset voltages, a LOW forward power is
simulated by means of R207, R185, and V47.
Comparator, U1-B, monitors whether the forward power is greater than 80
%
of
the set value. The FORWARD signal is compared with the set point value
SPRFP divided by R181 and R195, and U1.3 is set to L level if the HF power is
sufficiently high.
The 2 comparators, U2-B and U2-D, monitor the value of the ALC voltage,
whereby U2.3 is set to L level if the ALC voltage exceeds 1V and U2.19 switches
to L level with ALC voltage greater than 5V.
The BITHF signal is formed by linking signals SENS2, VSWR, U1.14 and U2.14.
This signal reports a fault in Harmonic Filter, A32. It is valid only during the BIT
routine, and this is the only time when it is inquire by controller A8. The BITHF
signal goes to H level if 1 of these is fulfilled:
– VSWR = H
– SENS2 = L (i.e., HF power present at the output of Amplifier Board, A31) and:
– if the forward power is too low, and/or
– the ALC voltage is 4V.
Page 63
