Fuji Electric Co., Ltd.
3-4
MT6M12343 Rev.1.0
Dec.-2016
Chapter 3
Detail of Signal Input/Output Terminals
Input signal
V
CCL(ON)
V
CCL(OFF)
<1> When
V
CCL
is lower than
V
CCL(ON)
, all lower side IGBTs are OFF state.
After
V
CCL
exceeding
V
CCL(ON)
, the fault output VFO is released (high level).
And the LVIC starts to operate, then next input is activated.
<2> The fault output VFO is activated when
V
CCL
falls below
V
CCL(OFF)
, and all lower side IGBT remains
OFF state.
If the voltage drop time is less than 20µs, the minimum pulse width of the fault output signal is 20µs
and all lower side IGBTs are OFF state regardless of the input signal condition.
<3> UV is reset after
t
FO
and
V
CCL
exceeding
V
CCL(ON)
, then the fault output VFO is reset simultaneously.
After that the LVIC starts to operate from the next input signal.
<4> When the voltage drop time is more than
t
FO
, the fault output pulse width is generated and all lower
side IGBTs are OFF state regardless of the input signal condition during the same time.
<1>
<2>
<3>
V
CCL(ON)
t
FO
20µs(min.)
V
CCL(ON)
V
CCL(OFF)
V
CCL
Supply voltage
Lower side IGBT
Collector Current
VFO output voltage
t
FO
<4>
<3>
UV detected
UV detected
UV detected
Fig.3-2 Operation sequence of V
CCL
Under Voltage protection (lower side arm)
