Fluke 9000A-Z80QT, Инструкция по эксплуатации

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Z8OQT
4-11. UUT Interface Section
-
Address
Lines
In a
manner
similar to that described for the
data
lines, all UUT addresses are fed
through
a series
of protection
circuits equipped with resistors and clipping
diodes. The diodes used to
protect
the address lines perform the additional
function of holding
the address lines at
zero volts any time the UUT Interface
Section
is
not controlled
by the microprocessor.
Address buffers U3 and US
are enabled when the microprocessor
is controlling
the UUT
Interface
Section. Conversely, the address buffers are disabled
to
isolate the microprocessor
from
the UUT whenever the microprocessor is
controlling the
Processor Section. This isolation
prevents the microprocessor
from
addressing the UUT when
operating
as
part of
the Processor Section. In
addition, the address lines are held at zero volts by the diodes used in the
protection circuits.
This holding action is provided
by the
hold
low circuit, made up of U12 and
associated
components.
This circuit drives the
+4.3-Volt
diode clipping voltage
down to -0.7 volts whenever the UUT
is
not
being addressed, creating a UUT
address
of
0000. Maintaining the UUT at address 0000 prevents any inadvertent
operation of
the UUT and associated systems equipment.
As described
for
the
data
lines, the address lines are equipped with logic level
detection
circuits; one circuit per line. The detection circuits consist of a series
of
latches coupled to the UUT side of the respective protection
circuits. A series
resistor at the
input of
each latch provides overvoltage protection.
The
address
lines are coupled to the inputs of latches U4 and U6 by lines
LAO-LAIS. The
input to each
latch
is
logic high if the line
is
driven high, and
logic low if
the
line
is
driven low. The LATCH signal from the Timing Section
latches the address line logic levels, at the time shown in Figure 4-4, to store the
logic levels representing the state
of
each
data line.
At the conclusion of
a UUT
operation, latches U4 and
U6
are separately
addressed by the microprocessor. Address decoder U7 produces the ADDLOEN
and ADDHIEN
signals to place the
contents of the latches on the
data
bus, one
byte at a time. The microprocessor compares the contents of the addressed
latches with the actual
address. Any difference between the contents of the
latches and actual address
is considered an address error.
4-12.
UUT Interface Section
-
Status and Control
Lines
The status and
control
lines are provided with
protection circuits, logic level
detection
circuits and latches. These circuits operate in a manner similar to those
provided with the
data
and address lines, and described in the previous
paragraphs.
4-12