ZSOQT
For
example, to specify a normal Quick RAM
test
over
RAM
addresses
5000
through 5FFF
with the default address increment
of
1,
do the following two
operations:
WHITE
@ 20 5000=0
WRITE
@ 20 5FFF=1
To
follow
that
test with
a
pattern
verification test over the same address space,
rewrite the ending address with the new specification:
WRITE
@ 20 5FFF=2
The Quick RAM test begins execution
as
soon
as
the
operator
completes the
entry of
the ending address. During and after
execution of
the test, the
mainframe
does not display any
informationabout
the progress
or
results
of
the
test unless requested by the operator. The test may
be
aborted
before completion
by
selecting another operation.
To
determine if the Quick RAM test
is
still
in
progress or
what
the test results
are, the mainframe
operator
should
perform
a
READ
@
ENTER
operation
(which commands a
READ operation
at the last entered address). In response,
the pod
returns
a byte
indicating
the
status
of the test or the test results. The
status codes and their meanings are shown in Table
3-4.
Read-only
special addresses in the F0 20XX range
contain additional
informa-
tion
about
the Quick RAM test, including errors and records
of
addresses used.
The special addresses for the Quick RAM test are described in Table
3-4.
Make
sure
that
you first specify the
READ
@
ENTER to find out if the test has been
completed before reading at any
of
the special addresses. Unless the test has been
completed (or failed), the
information
contained at the special addresses
will
pertain
to a previous test
rather
than the
current
test, and the
current
test
will
be
aborted.
For
example, if any
error
is
reported
by
the test, you can find the least-significant
byte
of
the address where the
error
occurred by performing a
READ
@
F0
2008.
You
can
get a hex mask of any bad
data
bits by performing a
READ
@
F0 2012.
If the
status
code
is
F0, the bad
data
bits mask contains the bits
that
were
not
read correctly after being written. If the status code
is
F
l,
the mask probably
contains bit
positions with incorrect address decoding. If the
status
code
is
F2,
the mask contains the bits in which
data
was not retained correctly,
3-11
Содержание 9000A-Z80QT
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