Z8OQT
2.
Remove the microprocessor from its socket.
3.
Connect the pod
under
test
to
+5V
and
-5V
power supplies. Apply
power
to
the
connector normally
coupled
to
the mainframe;
use
pins
2
and
15
for
+5V,
pin
21
for
-5V,
and pin
25
for ground.
If
available, use a
second mainframe and shielded cable to provide self test power to the
pod.
4.
Connect
a
mainframe to a second pod. Apply power to the
mainframe, then connect the second pod
ribbon
cable to the micro-
processor socket of the pod under test.
CAUTION
Do
not apply
or
remove any power
with
ribbon cable connected
between second pod and inoperative pod.
NOTE
A ll
references to data
and
addresses
in
thefollowing troubleshooting
guide
are
in hexadecimal
notation.
Refer to the Theory of
Operation
in
Section
4
and the schematic diagram in
Section
7
to troubleshoot an inoperative pod using the following steps
as
a
guide:
1.
Reset the pod by
momentarilyshorting
pins 22 and
23
of the shielded
cable connector located on the upper PCB assembly.
2.
Perform
a BUS test. Because of a
contentionsituation,
do not use the
default address. Instead, set the BUS test address to
2000.
3.
Perform
a
RAM test. The RAM addresses are listed in Table
5-4.
4.
Perform
a ROM test. The ROM addresses are listed in Table
5-4.
The
ROM checksum
returned
by a Quick
ROM
test
ofthe
pod
ROM
is
given
in Table
5—5.
5.
Check the
output operation
of
I/O
port
A (contained in
U21
and
U23) as follows:
a.
Perform
a write
operationto
the
port
A direction register to set
all
lines
of
I
/
0
port
A
(PAO—PA7) as
outputs.
The write address
is
2081;
write
data
is
FF.
5-15
Содержание 9000A-Z80QT
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