evertz 5601MSC, Инструкция по эксплуатации

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Model 5601MSC
Model 5601MSC Master SPG/Master Clock System
Page - 26
Revision 2.2
OPERATION
It is important to ensure that the incoming black burst reference is of good quality. The reference loop
BNCs are isolated from chassis ground and the signal is received differentially. This provides good
immunity to DC offsets and provides common-mode hum rejection. There should be no video content
on the reference otherwise reference lock could be lost, or higher jitter may be produced on the outputs.
The color frame sequence of the NTSC reference is decoded and used to phase the outputs. Because
the NTSC color frame sequence is only 2 frames long, this is not enough phase information to
deterministically lock signals which align to NTSC on longer periods. This includes 23.98Hz standards,
DARS/AES signals, and the 6/1.001Hz pulse. These signals align with NTSC once every 5 frames. This
is illustrated in Figure 2-5. The phase of these signals will be set arbitrarily and cannot be guaranteed to
be the same between different units that are locked to the same reference. The phase may also change
if the unit is restarted.
The phase locking ability of the 5601MSC when supplied with an NTSC reference is summarized at the
bottom of the lock diagram (Figure 2-7). The HD standards listed apply to both the HD test generators
and the tri-level sync outputs. The serial digital video test generator outputs are phased according to
SMPTE compliant timing, which may differ from the timing shown on Tektronix equipment. See the note
in section 2.2.6.
If the NTSC reference is lost, the unit will freerun on the selected oscillator as described in section
2.2.3. Note than when the
Genlock Range is set to Wide , the freerun drift upon loss of reference will be
much higher. When the NTSC reference is re-applied the Lock Type menu selection controls how the
5601MSC will respond to re-align its internal oscillator with the reference (see section 2.2.4).
When locked to NTSC without a ten-field reference, the AES/DARS outputs cannot be deterministically
phased. The AES/DARS/WC lck menu item located in the AES Audio menu off the OUTPUT root menu
should be set to NTSC/fractional , however the phase relationship will be chosen arbitrarily and may
change if the reference is lost or the unit is restarted.