ETOP P/I-P3BVL, Руководство пользователя

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Chapter 3 BIOS Configuration
P/I-P3BVL User's Manual 45
C8000 - CBFFF Shadow/DC000 - DFFFF Shadow
Shadowing a ROM reduces the memory available between 640KB to
1024KB. These fields determine whether optional ROM will be copied
to RAM or not.
Chipset Features Setup
This Setup menu controls the configuration of chipset on the SBC card.
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE INC.
Auto Configuration
:
Enabled Auto Detect DIMM/PCI Clk : Enabled
SDRAM RAS-to-CAS Delay : 3 Spread Spectrum : Disabled
SDRAM RAS Precharge Time : 3 CPU Host Clock (CPU/PCI) : Default
SDRAM CAS Latency Time : 3 CPU Warning Temperature
: 70
°
C / 158
°
F
SDRAM Precharge Control : Disabled Current System Temp.
: 30
°
C / 88
°
F
DRAM Data Integrity Mode : Non-ECC Current CPU1 Temperature
: 35
°
C / 95
°
F
System BIOS Cacheable : Disabled Current CPUFAN1 Speed : 4789 RPM
Video BIOS Cacheable
:
Enabled
Video RAM Cacheable : Disabled IN0 (V) : 1.98 V IN1 (V) : 1.50 V
8 Bit I/O Recovery Time : 3 IN2 (V) : 3.45 V + 5 V : 4.99 V
16 Bit I/O Recovery Time
:
2 +12 V : 12.46 V -12 V : -12.54V
Memory Hole At 15MB-16MB : Disabled -5V : - 5.21 V
Passive Release
:
Disabled Shutdown Temperature
::: 60
°
C / 140
°
F
Delayed Transaction : Disabled
AGP Aperture Size (MB) : 64
ESC : Quit
↑ ↓ → ←
: Select Item
F1 : Help PU/PD/+/- : Modify
F5 : Old Values (Shift) F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Auto Configuration
This field predefines values for DRAM, cache timing according to
CPU type and system clock. When this field is enabled, the predefined
items will become read-only.
SDRAM RAS-to-CAS Delay
When DRAM is refreshed, both rows and columns are addressed
separately. This field allows you to determine the timing of transition
from Row Address Strobe (RAS) to Column Address Strobe (CAS).
The default setting is
3
.
SDRAM RAS Precharge Time
The precharge time is the number of cycles it takes for the RAS to
accumulate its charge before DRAM refresh. If insufficient time is
allowed, refresh may be incomplete and the DRAM may fail to retain
data. The default setting is
3
.