DFI LanParty UT NF590 SLI-M2R/G, Руководство пользователя, Страница: 110 / 162

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BIOS Setup
SLI-Ready Memory
This field is used to configure the SLI-ready memory modules.
Timing Mode
Auto The BIOS will automatically detect all DRAM timing.
Max CLK This option uses the maximum DRAM clock.
Manual This option allows you to manually select the
DRAM’s clock speed.
Memory Clock Value/Limit
This field is used to select the clock speed of the DIMM.
Command Per Clock (CPC)
This field is used to enable the DRAM commands and address that
will be driven for 2 clock cycles and select the second phase of the
2 clock command and address.
CAS Latency Control (Tcl)
This field is used to select the clock cycle of the CAS latency time.
The option selected specifies the timing delay before SDRAM starts
a read command after receiving it.
Min RAS Active Time (Tras)
This field is used to select the minimum time RAS takes to read
from and write to a memory cell.