DFI LanParty UT NF590 SLI-M2R/G, Руководство пользователя

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109
3
BIOS Setup
Memory Timings
Move the cursor to this field and press <Enter>. The following
screen will appear.
The settings on the screen are for reference only. Your version may not be
identical to this one.
SLI-Ready Memory
Timing Mode
x Memory Clock Value/Limit
Command Per Clock (1/2T)
CAS Latency Control (Tcl)
Min RAS Active Time (Tras)
RAS to CAS Delay (Trcd)
Row Precharge Time (Trp)
RAS to RAS Delay (Trrd)
Row Cycle Time (Trc)
DIMM 1 Row Refresh (Trfc0)
DIMM 2 Row Refresh (Trfc1)
DIMM 3 Row Refresh (Trfc2)
DIMM 4 Row Refresh (Trfc3)
Read Precharge Time (Trtp)
Write Recovery Time (Twr)
Read to Write Delay (Trwt)
Write to Read Delay (Twtr)
Refresh Period Time (Tref)
Max Async Latency
Bank Interleave
DRAM On-Die Termination
Read Delay From Rx FIFO
Read/Write Queue Bypass
Bypass Maximum
32 Byte Granularity
Idle Cycle Limit
Dynamic Counter
Read DQS Skew
Phoenix - AwardBIOS CMOS Setup Utility
Memory Timings
Item Help
Menu Level
XXXX
↑↓→←
: Move Enter: Select F1: General Help +/-/PU/PD: Value F10: Save ESC: Exit
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
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Disabled
Auto
200 MHz
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Memory Data Drive Strength
The options are Auto, 0.75 X, 1.00 X, 1.25 X and 1.50 X.
Data Strobe Drive Strength
The options are Auto, 0.75 X, 1.00 X, 1.25 X and 1.50 X.