General memory module installation guidelines
Your system supports Flexible Memory Configuration, enabling the system to be configured and run in
any valid chipset architectural configuration. The following are the recommended guidelines for installing
memory modules:
• x4 and x8 DRAM based DIMMs can be mixed. For more information, see
Mode-specific guidelines
.
• Up to two dual- or single-rank RDIMMs can be populated per channel.
• Populate DIMM sockets only if a processor is installed. For single-processor systems, sockets A1 to A8
are available. For dual-processor systems, sockets A1 to A8 and sockets B1 to B8 are available.
• Populate all sockets with white release levers first, and then all the sockets with black release levers.
• When mixing memory modules with different capacities, populate the sockets with memory modules
with highest capacity first. For example, if you want to mix 4 GB and 8 GB DIMMs, populate 8 GB
DIMMs in the sockets with white release levers and 4 GB DIMMs in the sockets with black release
levers.
• In a dual-processor configuration, the memory configuration for each processor should be identical
through the first eight slots. For example, if you populate socket A1 for processor 1, then populate
socket B1 for processor 2, and so on.
• Memory modules of different capacities can be mixed provided other memory population rules are
followed (for example, 4 GB and 8 GB memory modules can be mixed).
• Mixing of more than two DIMM capacities in a system is not supported.
• Populate two DIMMs per processor (one DIMM per channel) at a time to maximize performance.
Mode-specific guidelines
Four memory channels are allocated to each processor. The allowable configurations depend on the
memory mode selected.
NOTE: You can mix x4 and x8 DRAM based DIMMs to support RAS features. However, all guidelines
for specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data
Correction (SDDC) in memory optimized (independent channel) mode. x8 DRAM based DIMMs
require Advanced ECC mode to gain SDDC.
The following sections provide additional slot population guidelines for each mode:
Advanced Error Correction Code (lockstep)
Advanced Error Correction Code (ECC) mode extends SDDC from x4 DRAM based DIMMs to both x4 and
x8 DRAMs. This protects against single DRAM chip failures during normal operation.
The installation guidelines for memory modules are as follows:
• Memory modules must be identical in size, speed, and technology.
• DIMMs installed in memory sockets with white release levers must be identical and the same rule
applies for sockets with black release levers. This ensures that identical DIMMs are installed in
matched pair —for example, A1 with A2, A3 with A4, A5 with A6, and so on.
NOTE: Advanced ECC with mirroring is not supported.
44
