Cypress EX-USB FX3, Руководство программиста

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82 FX3 Programmers Manual, Doc. # 001-64707 Rev. *C
FX3 Application Examples
7.4 UVC examples
The UVC example is an implementation of a USB Video Class (UVC) device in FX3. This example
illustrates:
■
Class device implementation
■
Class and Vendor request handling
■
Multi-threaded application development
7.4.1 cyfxuvcinmem – UVC from System Memory
This example demonstrates the USB video class device stack implementation for FX3. The example
repeatedly streams the pre-filled images from the FX3 system memory to the USB host PC. This
example uses Isochronous endpoints.
7.4.2 cyfxuvcinmem_bulk – Bulk Endpoint Based UVC from System Memory
This example demonstrates the USB video class device stack implementation for FX3. The example
is similar to the UVC example, but uses Bulk endpoints instead of Isochronous endpoints.
7.5 Slave FIFO Examples
The slave FIFO is one of the GPIF-II implementations which allow FX3 to be connected to external
controllers / peripherals.
7.5.1 slfifoasync – Asynchronous Slave FIFO
This example demonstrates the use of FX3 GPIF-II to implement an asynchronous slave FIFO. The
example transmits the data received from USB host on EP1 OUT to the slave FIFO egress socket
and also transmits the data received on slave FIFO ingress socket to EP1 IN. This requires a slave
FIFO master capable of reading and writing data to be attached to FX3.
7.5.2 slfifosync – Synchronous Slave FIFO
This example demonstrates the use of FX3 GPIF-II to implement a synchronous slave FIFO. The
example transmits the data received from USB host on EP1 OUT to the slave FIFO egress socket
and also transmits the data received on slave FIFO ingress socket to EP1 IN. This requires a slave
FIFO master capable of reading and writing data to be attached to FX3.
7.5.3 slfifoasync5bit: Async Slave Fifo 5 Bit Example
This example implements a USB-to-Asynchronous Slave FIFO bridge device, which makes use of
all the endpoints supported by the FX3 device. A 5-bit addressed version of the Slave FIFO protocol
is used such that 32 DMA channels can be created across the GPIF-II port.
7.5.4 slfifosync5bit: Sync Slave Fifo 5 Bit Example
This example implements a USB-to-Synchronous Slave FIFO bridge device, which makes use of all
the endpoints supported by the FX3 device.
7.6 Mass Storage Example
This example uses a small portion of the FX3 system RAM to implement a mass storage (Bulk Only
Transport) class device. This example shows how the mass storage command parsing and handling
can be implemented in FX3 firmware.