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CXR Larus 80-100-400 Issue 2 July 2006 page
3-49
format:
E1 input reference A (bridges input to 54542 card A when installed in the
first SMU slot of the 54500 shelf).
E1 input reference B (bridges input to 54542 card B when installed in the
first SMU slot of the 54500 shelf).
Three external inputs (3, 4, and 5) when installed in the first SMU slot, five
additional external inputs (6 through 10) when installed in the second SMU
slot. Input 5 (and Input 10 on the second card) can also be supplied from
the front panel MON IN jack.
b. Clock input used as a reference for all phase measurements,
transistor-transistor logic (TTL) from track and hold cards A and B, the
same clock as selected by the output cards of the system, i.e., the better
locally available clock. Note that the reference clock selection is under
microprocessor control and may be overridden if desired.
3.3915 Input
Impedance:
a. Terminating
E1, 2048 KHz, 120 ohms ±10% balanced
a. Bridging
E1, 2048 KHz, 984 ohms ±10% balanced
a. Monitor
E1, 2048 KHz, 1500 ohms Tip side, 1500 ohms Ring side (typical)
Requires external balanced resistors to the Input Monitor Terminals.
3.3916 Input
Sensitivity:
-7.5 dB to 0 dB, 3 volts D1
-7.5 dB to 0 dB, 1.9 volt 2048 kHz
3.3917 Outputs:
a. Serial data link to 54550 Information Management Card for performance,
alarm, control, and personality information.
b. Alarm lead to 54560 Alarm Interface Card for excess bit slip between track
and hold cards (one bit slip in 30 minutes) or LOF or LOS on input being
monitored.
c. Sync Status Messaging report (E1 only) to 54550 Information Management
Card through serial link.
d. One-wire interface used by the 54550 to determine whether or not the
54542 is installed.
3.3918 Measurements:
a. Continuous monitoring of bit slip between track and hold cards; alarm
output to 54550 and 54560 if this is greater than one slip every 30 minutes.
Содержание 54500-16
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