COBHAM GR740, Руководство пользователя

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GR740-UM-DS, Nov 2017, Version 1.7 453 www.cobham.com/gaisler
GR740
Table 591. Timing parameters - PROM and I/O accesses
Name Parameter Reference edge Min Max Unit
t
FTMCTRL 0
address clock to output delay
rising clk edge
1)
0
2)
40
3) ns
t
FTMCTRL 1
clock to output delay
rising clk edge
1)
0
2)
40
3) ns
t
FTMCTRL
2
clock to output delay
rising clk edge
1)
0
2)
40
3) ns
t
FTMCTRL 3
clock to data output delay
rising clk edge
1)
0
2)
40
3) ns
t
FTMCTRL 4
clock to data non-tri-state delay
rising clk edge
1)
0
2)
40
3)
ns
t
FTMCTRL 5
clock to data tri-state delay
rising clk edge
1)
0
2)
40
3)
ns
t
FTMCTRL 6
clock to output delay
rising clk edge
1)
0
2)
40
3)
ns
t
FTMCTRL 7
data input to clock setup
rising clk edge
1)
0
2)
- ns
t
FTMCTRL 8
data input from clock hold
rising clk edge
1)
- - ns
t
FTMCTRL 9
input to clock setup
rising clk edge
1)
0
2)
- ns
t
FTMCTRL 10
input from clock hold
rising clk edge
1) - - ns
1)
Timing values are relative to the internal clock for the PROM/IO memory controller.
2) Guaranteed by design, not tested
3) Verified by static timing analysis, not tested
Figure 68. Timing waveforms
- I/O accesses
t
FTMCTRL0
promio_addr]
internal sys_clk
t
FTMCTRL1
promio_data[]
(output)
promio_data[]
(input)
io_sn[]
t
FTMCTRL3,
t
FTMCTRL4
promio_oen
promio_wen
t
FTMCTRL9
promio_brdyn
t
FTMCTRL10
t
FTMCTRL2
t
FTMCTRL2
t
FTMCTRL6
t
FTMCTRL6
promio_addr[]
internal sys_clk
io_sn[]
t
FTMCTRL7
t
FTMCTRL8
t
FTMCTRL5
t
FTMCTRL1