ADT7476
Rev. B | Page 64 of 72
Table 39. Register 0x63—Enhanced Acoustics Register 2 (Power-On Default = 0x00)
Bit
Name
Description
[2:0]
ACOU3
R/W
Assuming that PWMx is associated with the Local temperature channel, these bits define the maximum rate of change
of the PWMx output for local temperature-related changes. Instead of the fan speed jumping instantaneously to its
newly determined speed, it ramps gradually at the rate determined by these bits. This feature ultimately enhances the
acoustics of the fan.
When Bit 7 of Configuration Register 6 (0x10) is 0
Time Slot Increase
Time for 0% to 100%
000 = 1
37.5 sec
001 = 2
18.8 sec
010 = 3
12.5 sec
011 = 4
7.5 sec
100 = 8
4.7 sec
101 = 12
3.1 sec
110 = 24
1.6 sec
111 = 48
0.8 sec
When Bit 7 of Configuration Register 6 (0x10) is 1
Time Slot Increase
Time for 0% to 100%
000 = 1
52.2 sec
001 = 2
26.1 sec
010 = 3
17.4 sec
011 = 4
10.4 sec
100 = 8
6.5 sec
101 = 12
4.4 sec
110 = 24
2.2 sec
111 = 48
1.1 sec
[3]
EN3
R/W
When this bit is 1, smoothing is enabled on the local temperature channel.
[6:4]
ACOU2
R/W
Assuming that PWMx is associated with the Remote 2 temperature channel, these bits define the maximum rate of
change of the PWMx output for Remote 2 temperature related changes. Instead of the fan speed jumping
instantaneously to its newly determined speed, it ramps gradually at the rate determined by these bits. This feature
ultimately enhances the acoustics of the fan.
When Bit 7 of Configuration Register 6 (0x10) is 0
Time Slot Increase
Time for 0% to 100%
000 = 1
37.5 sec
001 = 2
18.8 sec
010 = 3
12.5 sec
011 = 4
7.5 sec
100 = 8
4.7 sec
101 = 12
3.1 sec
110 = 24
1.6 sec
111 = 48
0.8 sec
When Bit 7 of Configuration Register 6 (0x10) is 1
Time Slot Increase
Time for 0% to 100%
000 = 1
52.2 sec
001 = 2
26.1 sec
010 = 3
17.4 sec
011 = 4
10.4 sec
100 = 8
6.5 sec
101 = 12
4.4 sec
110 = 24
2.2 sec
111 = 48
1.1 sec
[7]
EN2
R/W
When this bit is 1, smoothing is enabled on the Remote 2 temperature channel.
1
This register becomes read-only when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail.
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